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Description
Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which

Nonvolatile memory (NVM) technologies have been an integral part of electronic systems for the past 30 years. The ideal non-volatile memory have minimal physical size, energy usage, and cost while having maximal speed, capacity, retention time, and radiation hardness. A promising candidate for next-generation memory is ion-conducting bridging RAM which is referred to as programmable metallization cell (PMC), conductive bridge RAM (CBRAM), or electrochemical metallization memory (ECM), which is likely to surpass flash memory in all the ideal memory characteristics. A comprehensive physics-based model is needed to completely understand PMC operation and assist in design optimization.

To advance the PMC modeling effort, this thesis presents a precise physical model parameterizing materials associated with both ion-rich and ion-poor layers of the PMC's solid electrolyte, so that captures the static electrical behavior of the PMC in both its low-resistance on-state (LRS) and high resistance off-state (HRS). The experimental data is measured from a chalcogenide glass PMC designed and manufactured at ASU. The static on- and off-state resistance of a PMC device composed of a layered (Ag-rich/Ag-poor) Ge30Se70 ChG film is characterized and modeled using three dimensional simulation code written in Silvaco Atlas finite element analysis software. Calibrating the model to experimental data enables the extraction of device parameters such as material bandgaps, workfunctions, density of states, carrier mobilities, dielectric constants, and affinities.

The sensitivity of our modeled PMC to the variation of its prominent achieved material parameters is examined on the HRS and LRS impedance behavior.

The obtained accurate set of material parameters for both Ag-rich and Ag-poor ChG systems and process variation verification on electrical characteristics enables greater fidelity in PMC device simulation, which significantly enhances our ability to understand the underlying physics of ChG-based resistive switching memory.
ContributorsRajabi, Saba (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Non-volatile memory (NVM) has become a staple in the everyday life of consumers. NVM manifests inside cell phones, laptops, and most recently, wearable tech such as smart watches. NAND Flash has been an excellent solution to conditions requiring fast, compact NVM. Current technology nodes are nearing the physical limits of

Non-volatile memory (NVM) has become a staple in the everyday life of consumers. NVM manifests inside cell phones, laptops, and most recently, wearable tech such as smart watches. NAND Flash has been an excellent solution to conditions requiring fast, compact NVM. Current technology nodes are nearing the physical limits of scaling, preventing flash from improving. To combat the limitations of flash and to appease consumer demand for progressively faster and denser NVM, new technologies are needed. One possible candidate for the replacement of NAND Flash is programmable metallization cells (PMC). PMC are a type of resistive memory, meaning that they do not rely on charge storage to maintain a logic state. Depending on their application, it is possible that devices containing NVM will be exposed to harsh radiation environments. As part of the process for developing a novel memory technology, it is important to characterize the effects irradiation has on the functionality of the devices.

This thesis characterizes the effects that ionizing γ-ray irradiation has on the retention of the programmed resistive state of a PMC. The PMC devices tested used Ge30Se70 doped with Ag as the solid electrolyte layer and were fabricated by the thesis author in a Class 100 clean room. Individual device tiles were wire bonded into ceramic packages and tested in a biased and floating contact scenario.

The first scenario presented shows that PMC devices are capable of retaining their programmed state up to the maximum exposed total ionizing dose (TID) of 3.1 Mrad(Si). In this first scenario, the contacts of the PMC devices were left floating during exposure. The second scenario tested shows that the PMC devices are capable of retaining their state until the maximum TID of 10.1 Mrad(Si) was reached. The contacts in the second scenario were biased, with a 50 mV read voltage applied to the anode contact. Analysis of the results show that Ge30Se70 PMC are ionizing radiation tolerant and can retain a programmed state to a higher TID than NAND Flash memory.
ContributorsTaggart, Jennifer Lynn (Author) / Barnaby, Hugh (Thesis advisor) / Kozicki, Michael (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2015
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Description
Counterfeiting of goods is a widespread epidemic that is affecting the world economy. The conventional labeling techniques are proving inadequate to thwart determined counterfeiters equipped with sophisticated technologies. There is a growing need of a secure labeling that is easy to manufacture and analyze but extremely difficult to copy. Programmable

Counterfeiting of goods is a widespread epidemic that is affecting the world economy. The conventional labeling techniques are proving inadequate to thwart determined counterfeiters equipped with sophisticated technologies. There is a growing need of a secure labeling that is easy to manufacture and analyze but extremely difficult to copy. Programmable metallization cell technology operates on a principle of controllable reduction of a metal ions to an electrodeposit in a solid electrolyte by application of bias. The nature of metallic electrodeposit is unique for each instance of growth, moreover it has a treelike, bifurcating fractal structure with high information capacity. These qualities of the electrodeposit can be exploited to use it as a physical unclonable function. The secure labels made from the electrodeposits grown in radial structure can provide enhanced authentication and protection from counterfeiting and tampering.

So far only microscale radial structures and electrodeposits have been fabricated which limits their use to labeling only high value items due to high cost associated with their fabrication and analysis. Therefore, there is a need for a simple recipe for fabrication of macroscale structure that does not need sophisticated lithography tools and cleanroom environment. Moreover, the growth kinetics and material characteristics of such macroscale electrodeposits need to be investigated. In this thesis, a recipe for fabrication of centimeter scale radial structure for growing Ag electrodeposits using simple fabrication techniques was proposed. Fractal analysis of an electrodeposit suggested information capacity of 1.27 x 1019. The kinetics of growth were investigated by electrical characterization of the full cell and only solid electrolyte at different temperatures. It was found that mass transport of ions is the rate limiting process in the growth. Materials and optical characterization techniques revealed that the subtle relief like structure and consequently distinct optical response of the electrodeposit provides an added layer of security. Thus, the enormous information capacity, ease of fabrication and simplicity of analysis make macroscale fractal electrodeposits grown in radial programmable metallization cells excellent candidates for application as physical unclonable functions.
ContributorsChamele, Ninad (Author) / Kozicki, Michael (Thesis advisor) / Barnaby, Hugh (Thesis advisor) / Newman, Nathan (Committee member) / Arizona State University (Publisher)
Created2017
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Description
The Built-In Self-Test for Simultaneous Transmit and Receive (BIST for STAR) will be able to solve the challenges of transmitting and receiving at the same time at the same frequency. One of the major components is the STAR antenna which transmits and receives along the same pathway. The main problem

The Built-In Self-Test for Simultaneous Transmit and Receive (BIST for STAR) will be able to solve the challenges of transmitting and receiving at the same time at the same frequency. One of the major components is the STAR antenna which transmits and receives along the same pathway. The main problem with doing both on the same path is that the transmit signal is usually much stronger in power compared to the received signal. The transmit signal has echoes and leakages that cause self-interference, preventing the received signal from being properly obtained. The solution developed in this project is the BIST component, which will help calculate the functional gain and phase offset of the interference signal and subtract it from the pathway so that the received signal remains. The functions of the proposed circuit board can be modeled in Matlab, where an emulation code generates a random, realistic functional gain and delay for the interference. From the generated values, the BIST for STAR was simulated to output what the measurements would be given the strength of the input signal and a controlled delay. The original Matlab code models an ideal environment directly recalculating the functional gain and phase from the given measurements in a second Matlab script. The actual product will not be ideal; a possible source of error to be considered is the effect of thermal noise. To observe the effect of noise on the BIST for STAR's performance, the Matlab code was expanded upon to include a component for thermal noise, and a method of analyzing the results of the board.
ContributorsLiu, Jennifer Yuan (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
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Description
The capstone portion of this project was to use the established STaR antennas and add a Built in Self-Test system to ensure the quality of the signals being received. This part of the project required a MatLab simulation to be built, a layout created, and a PCB designed for fabrication.

The capstone portion of this project was to use the established STaR antennas and add a Built in Self-Test system to ensure the quality of the signals being received. This part of the project required a MatLab simulation to be built, a layout created, and a PCB designed for fabrication. In theory, the test BiST unit will allow the gain and delay of the transmitted signal and then cancel out unneeded interference for the received signal. However, this design required multiple paths to maintain the same lengths to keep the signals in phase for comparison. The purpose of this thesis is to show the potential drop-offs of the quality of the signals from being out of phase due to the wires that should be similar, being off by a certain percentage. This project will calculate the theoretical delay of all wires being out of sync and then add this delay to the established MatLab simulation. This report will show the relationship between the error of the received variables and what the actual generated values. And, the last part of the document will demonstrate the simulation by creating a signal and comparing it to its received counterpart. The end result of the study showed that the percent error between what is seen and what is expected is near insignificant and, hence, not an issue with regards to the quality of the project.
ContributorsSomers, Tyler Scott (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
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Description
The purpose of the Simultaneous Transmit and Receive Antenna project is to design a test circuit that will allow us to use an antenna to both send out and receive a signal at the same time on the same frequency. The test circuit will generate DC voltage levels that we

The purpose of the Simultaneous Transmit and Receive Antenna project is to design a test circuit that will allow us to use an antenna to both send out and receive a signal at the same time on the same frequency. The test circuit will generate DC voltage levels that we can use to solve for the gain and delay of the transmit interference, so we will then be able to cancel out the unwanted signal from the received signal. With a theoretically perfect setup, the transmitted signal will be able to be completely isolated from the received signal, leaving us with only what we want at the output. In practice, however, this is not the case. There are many variables that will affect the integrity of the DC output of the test signal. As the output voltage level deviates from its theoretical perfect measurement, the precision to which we are able to solve for the gain and delay values decreases. The focus of this study is to estimate the effect of using a digital measurement tool to measure the output of the test circuit. Assuming a voltmeter with 1 volt full range, simulations were run using measurements stored at different bit resolutions, from 8-bit storage up to 16-bit storage. Since the physical hardware for the Simultaneous Transmit and Receive test circuit is not currently available, these tests were performed with an edited version of the Matlab simulation created for the Senior Design project. The simulation was run 2000 times over each bit resolution to get a wide range of generated values, then the error from each run was analyzed to come to a conclusion on the effect of the digital measurement on the design. The results of these simulations as well as further details of the project and testing are described inside this document.
ContributorsKral, Brandon Michael (Author) / Ozev, Sule (Thesis director) / Kozicki, Michael (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
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Description
Interposers have been used in the system packaging industry for years. They have advanced from basic devices used for connection to providing new opportunities for System-in-Package and System-on-Chip architectures. Currently interposers cannot be reconfigured. Systems may implement extra input-output connections for hard reconfiguration. However, programmable metallization cells (PMC) offer the

Interposers have been used in the system packaging industry for years. They have advanced from basic devices used for connection to providing new opportunities for System-in-Package and System-on-Chip architectures. Currently interposers cannot be reconfigured. Systems may implement extra input-output connections for hard reconfiguration. However, programmable metallization cells (PMC) offer the opportunity to change this. PMCs offer reliable and fast switching that has the potential to be used as resistive memory cells as well. PMCs operate by growing a metal filament from the device cathode to its anode through a solid electrolyte by applying a voltage. By reversing the voltage bias, the filament will retract. The PMC’s electrolyte can also be made from a range of materials being chalcogen or oxide based, allowing for integration in a variety of systems. By utilizing PMCs in an interposer to create a “smart interposer,” it would be possible to create easily reconfigurable systems. This project investigated how PMCs function in a lab setting. By using a probe station, the current-voltage characteristics were generated for a variety of limiting current values. The PMC on and off state resistances were extrapolated for further understanding of its switch function. In addition, works-like prototypes were developed to show the function a smart interposer. In these prototypes, transistors or relays were used as the switching mechanism in place of the PMCs. The final works-like prototype demonstrated how a smart interposer might function by using a switching mechanism to swap between half adder and full adder outputs for the same inputs.
ContributorsSpiker, Bradley Dahlton (Author) / Kozicki, Michael (Thesis director) / Gonzalez Velo, Yago (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2020-05
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Description
Lateral programmable metallization cells (PMC) utilize the properties of electrodeposits grown over a solid electrolyte channel. Such devices have an active anode and an inert cathode separated by a long electrodeposit channel in a coplanar arrangement. The ability to transport large amount of metallic mass across the channel makes these

Lateral programmable metallization cells (PMC) utilize the properties of electrodeposits grown over a solid electrolyte channel. Such devices have an active anode and an inert cathode separated by a long electrodeposit channel in a coplanar arrangement. The ability to transport large amount of metallic mass across the channel makes these devices attractive for various More-Than-Moore applications. Existing literature lacks a comprehensive study of electrodeposit growth kinetics in lateral PMCs. Moreover, the morphology of electrodeposit growth in larger, planar devices is also not understood. Despite the variety of applications, lateral PMCs are not embraced by the semiconductor industry due to incompatible materials and high operating voltages needed for such devices. In this work, a numerical model based on the basic processes in PMCs – cation drift and redox reactions – is proposed, and the effect of various materials parameters on the electrodeposit growth kinetics is reported. The morphology of the electrodeposit growth and kinetics of the electrodeposition process are also studied in devices based on Ag-Ge30Se70 materials system. It was observed that the electrodeposition process mainly consists of two regimes of growth – cation drift limited regime and mixed regime. The electrodeposition starts in cation drift limited regime at low electric fields and transitions into mixed regime as the field increases. The onset of mixed regime can be controlled by applied voltage which also affects the morphology of electrodeposit growth. The numerical model was then used to successfully predict the device kinetics and onset of mixed regime. The problem of materials incompatibility with semiconductor manufacturing was solved by proposing a novel device structure. A bilayer structure using semiconductor foundry friendly materials was suggested as a candidate for solid electrolyte. The bilayer structure consists of a low resistivity oxide shunt layer on top of a high resistivity ion carrying oxide layer. Devices using Cu2O as the low resistivity shunt on top of Cu doped WO3 oxide were fabricated. The bilayer devices provided orders of magnitude improvement in device performance in the context of operating voltage and switching time. Electrical and materials characterization revealed the structure of bilayers and the mechanism of electrodeposition in these devices.
ContributorsChamele, Ninad (Author) / Kozicki, Michael (Thesis advisor) / Barnaby, Hugh (Committee member) / Newman, Nathan (Committee member) / Gonzalez-Velo, Yago (Committee member) / Arizona State University (Publisher)
Created2020