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Description
Carrier lifetime is one of the few parameters which can give information about the low defect densities in today's semiconductors. In principle there is no lower limit to the defect density determined by lifetime measurements. No other technique can easily detect defect densities as low as 10-9 - 10-10 cm-3 in a simple, contactless room temperature measurement. However in practice, recombination lifetime τr measurements such as photoconductance decay (PCD) and surface photovoltage (SPV) that are widely used for characterization of bulk wafers face serious limitations when applied to thin epitaxial layers, where the layer thickness is smaller than the minority carrier diffusion length Ln. Other methods such as microwave photoconductance decay (µ-PCD), photoluminescence (PL), and frequency-dependent SPV, where the generated excess carriers are confined to the epitaxial layer width by using short excitation wavelengths, require complicated configuration and extensive surface passivation processes that make them time-consuming and not suitable for process screening purposes. Generation lifetime τg, typically measured with pulsed MOS capacitors (MOS-C) as test structures, has been shown to be an eminently suitable technique for characterization of thin epitaxial layers. It is for these reasons that the IC community, largely concerned with unipolar MOS devices, uses lifetime measurements as a "process cleanliness monitor." However when dealing with ultraclean epitaxial wafers, the classic MOS-C technique measures an effective generation lifetime τg eff which is dominated by the surface generation and hence cannot be used for screening impurity densities. I have developed a modified pulsed MOS technique for measuring generation lifetime in ultraclean thin p/p+ epitaxial layers which can be used to detect metallic impurities with densities as low as 10-10 cm-3. The widely used classic version has been shown to be unable to effectively detect such low impurity densities due to the domination of surface generation; whereas, the modified version can be used suitably as a metallic impurity density monitoring tool for such cases.
ContributorsElhami Khorasani, Arash (Author) / Alford, Terry (Thesis advisor) / Goryll, Michael (Committee member) / Bertoni, Mariana (Committee member) / Arizona State University (Publisher)
Created2013
Description
Polycrystalline CdS/CdTe solar cells continue to dominate the thin-film photovoltaics industry with an achieved record efficiency of over 22% demonstrated by First Solar, yet monocrystalline CdTe devices have received considerably less attention over the years. Monocrystalline CdTe double-heterostructure solar cells show great promise with respect to addressing the problem of low Voc with the passing of the 1 V benchmark. Rapid progress has been made in driving the efficiency in these devices ever closer to the record presently held by polycrystalline thin-films. This achievement is primarily due to the utilization of a remote p-n heterojunction in which the heavily doped contact materials, which are so problematic in terms of increasing non-radiative recombination inside the absorber, are moved outside of the CdTe double heterostructure with two MgyCd1-yTe barrier layers to provide confinement and passivation at the CdTe surfaces. Using this design, the pursuit and demonstration of efficiencies beyond 20% in CdTe solar cells is reported through the study and optimization of the structure barriers, contacts layers, and optical design. Further development of a wider bandgap MgxCd1-xTe solar cell based on the same design is included with the intention of applying this knowledge to the development of a tandem solar cell constructed on a silicon subcell. The exploration of different hole-contact materials—ZnTe, CuZnS, and a-Si:H—and their optimization is presented throughout the work. Devices utilizing a-Si:H hole contacts exhibit open-circuit voltages of up to 1.11 V, a maximum total-area efficiency of 18.5% measured under AM1.5G, and an active-area efficiency of 20.3% for CdTe absorber based devices. The achievement of voltages beyond 1.1V while still maintaining relatively high fill factors with no rollover, either before or after open-circuit, is a promising indicator that this approach can result in devices surpassing the 22% record set by polycrystalline designs. MgxCd1-xTe absorber based devices have been demonstrated with open-circuit voltages of up to 1.176 V and a maximum active-area efficiency of 11.2%. A discussion of the various loss mechanisms present within these devices, both optical and electrical, concludes with the presentation of a series of potential design changes meant to address these issues.
ContributorsBecker, Jacob J (Author) / Zhang, Yong-Hang (Thesis advisor) / Bertoni, Mariana (Committee member) / Vasileska, Dragica (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2017