Matching Items (61)

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High Efficiency Electronics for Space Applications

Description

The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could

The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with low voltage digital circuits on a single chip in an extremely cost effective way. Higher integration leads to electronics with increased functionality and a smaller finished product. The MESFETs are designed in-house by the research group led by Dr. Trevor Thornton. The layouts are then sent to multi-project wafer (MPW) integrated circuit foundry companies, such as the Metal Oxide Semiconductor Implementation Service (MOSIS) to be fabricated. Once returned, the electrical characteristics of the devices are measured. The MESFET has been implemented in various applications by the research group, including the low dropout linear regulator (LDO) and RF power amplifier. An advantage of the MESFET is that it can function in extreme environments such as space, allowing for complex electrical systems to continue functioning properly where traditional transistors would fail.

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Date Created
  • 2015-05

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Foundry Opportunities

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Company X is one of the world's largest semiconductor companies in the world, having a current market capitalization of 177.44 Billion USD, an enterprise value of 173.6 Billion USD, and

Company X is one of the world's largest semiconductor companies in the world, having a current market capitalization of 177.44 Billion USD, an enterprise value of 173.6 Billion USD, and generated 52.7 billion USD in revenue in fiscal year 2013. Recently, Company X has been looking to expand its Foundry business. The Foundry business in the semiconductor business is the actual process of making the chips. This process can be approached in several different ways by companies who need their chips built. A company, like TSMC, can be considered a pure-play company and only makes chips for other companies. A fabless company, like Apple, creates its own chip design and then allows another company to build them. It also uses other chip designs for its products, but outsources the building to another company. Lastly, the integrated device manufacturing companies like Samsung or Company X both design and build the chip. The foundry industry is a rather novel market for Company X because it owns less than 1 percent of the market. However, the industry itself is rather large, generating a total of 40 billion dollars in revenue annually, with expectations to have increasing year over year growth into the foreseeable future. The industry is fairly concentrated with TSMC being the top competitor, owning roughly 50 percent of the market with Samsung and Global Foundries lagging behind as notable competitors. It is a young industry and there is potential opportunity for companies that want to get into the business. For Company X, it is not only another market to get into, but also an added business segment to supplant their business segments that are forecasted to do poorly in the near future. This thesis will analyze the financial opportunity for Company X in the foundry space. Our final product is a series of P&L's which illustrate our findings. The results of our analysis were presented and defended in front of a panel of Company X managers and executives.

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  • 2015-05

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Wet NanoBonding of Semiconducting Surfaces Optimized via Surface Energy Modification using Three Liquid Contact Angle Analysis as a Metrology

Description

Semiconductor wafers are analyzed and their total surface energy γT is measured in three components according to the van Oss theory: (1) γLW, surface energy due to Lifshitz-van der Waals

Semiconductor wafers are analyzed and their total surface energy γT is measured in three components according to the van Oss theory: (1) γLW, surface energy due to Lifshitz-van der Waals forces or dipole interactions, (2) γ+, surface energy due to interactions with electron donors, and (3) γ–, surface energy due to interactions with electron acceptors. Surface energy is measured via Three Liquid Contact Angle Analysis (3LCAA), a method of contact angle measurement using the sessile drop technique and three liquids: water, glycerin, and α-bromonaphthalene. This research optimizes the experimental methods of 3LCAA, proving that the technique produces reproducible measurements for surface energy on a variety of surfaces. Wafer surfaces are prepared via thermal oxidation, rapid thermal oxidation, ion beam oxidation, rapid thermal annealing, hydrofluoric acid etching, the RCA clean, the Herbots-Atluri (H-A) process, and the dry and wet anneals used for Dry and Wet NanoBonding™, respectively.
NanoBonding™ is a process for growing molecular bonds between semiconducting surfaces to create a hermetic seal. NanoBonding™ prevents fluid percolation, protecting integrated electronic sensors from corrosive mobile ion species such as sodium. This can extend the lifetime of marine sensors and glucose sensors from less than one week to over two years, dramatically reducing costs and improving quality of life for diabetic patients. Surface energy measurement is critical to understanding and optimizing NanoBonding™. Surface energies are modified through variations on the H-A process, and measured via 3LCAA. The majority of this research focuses on silicon oxide surfaces.
This is the first quantitative measurement of gallium arsenide surface energy in three components. GaAs is a III-V semiconductor with potential commercial use in transistors, but its oxide layer slowly evaporates over time. In subsequent research, 3LCAA may prove key to developing a stable GaAs oxide layer.

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Date Created
  • 2016-05

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Intel Collaborative Thesis, Substrate Group 2012

Description

Our thesis project aims to evaluate a major semiconductor company's (The Company) substrate supplier strategy in order to find the ideal number of suppliers that minimizes fixed cost and supplier

Our thesis project aims to evaluate a major semiconductor company's (The Company) substrate supplier strategy in order to find the ideal number of suppliers that minimizes fixed cost and supplier power. With The Company spending roughly $2.2 billion annually on substrates, supplier strategy has a significant impact on their costs. As a general rule in micro processing, the circuitry of the processor becomes twice as dense every two years. The substrate, being the pathway through which the process or with the motherboard, must become more advanced as well, although the technology does not grow at nearly the same speed. Leading the way in their industry, The Company is at the forefront of technology and produces the world's most advanced processing units. The suppliers The Company purchases from must be innovators in their own respective fields in order to be capable of handling such "bleeding-edge" technology; this requires a supplier to make a commitment to continuously work towards meeting The Company's constantly changing technological requirements. The ultimate goal of this project is to determine the ideal number of substrate suppliers that balances the effects of production costs and buying power to give the company the best overall purchase price.

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Date Created
  • 2012-05

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Capital Efficiency Metrics

Description

We gathered and analyzed key data from a wide-range of competitors in the foundry, fabless, and Integrated design manufacturing business. After detecting a downward trend in the return of invested

We gathered and analyzed key data from a wide-range of competitors in the foundry, fabless, and Integrated design manufacturing business. After detecting a downward trend in the return of invested capital (ROIC) and higher capital intensity of Company X, we searched for alternatives to turn this around. We conclude that, to decrease the net PPE of Company X, a sale-leaseback transaction would help Company X reduce their balance sheet and provided financing to advance their manufacturing capabilities.

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Date Created
  • 2018-05

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Internet of Things Collaborative Project

Description

The purpose of this thesis was to design a market entrance strategy for Company X to enter the microcontroller (MCU) market within the Internet of Things (IoT). The five IoT

The purpose of this thesis was to design a market entrance strategy for Company X to enter the microcontroller (MCU) market within the Internet of Things (IoT). The five IoT segments are automotive; medical; retail; industrial; and military, aerospace, and government. To reach a final decision, we will research the markets, analyze make versus buy scenarios, and deliver a financial analysis on the chosen strategy. Based on the potential financial benefits and compatibility with Company X's current business model, we recommend that Company X enter the automotive segment through mergers & acquisitions (M&A). After analyzing the supply chain structure of the automotive IoT, we advise Company X to acquire Freescale Semiconductor for $46.98 per share.

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Date Created
  • 2015-05

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INTEL ATOM'S TRANSITION TO THE MOBILE DEVICES CPU MARKET

Description

The semiconductor industry looks to constantly improve the efficiency of research and development in order to reduce costs and time to market. One such method was designed in order to

The semiconductor industry looks to constantly improve the efficiency of research and development in order to reduce costs and time to market. One such method was designed in order to decrease time spent inducing warpage in integrated circuits in an Intel research process. Intel's Atom product line seeks to compete with ARM architecture by entering the mobile devices CPU market. Due to the fundamental differences between the Atom's Bonnell architecture and the ARM architecture, the Intel Atom product line must utilize such improved research and development methods. Until power consumption is drastically lowered while maintaining processing speed, the Atom product line will not be able to effectively break into the mobile devices CPU market.

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Date Created
  • 2013-05

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Optical Characterization of Band Gaps for Sulfide-based Chalcogenide and Copper Oxide Thin Films

Description

The purpose of this research is to optically characterize the band gaps of sulfide-based chalcogenides and copper oxide thin films. The analysis on the copper oxide thin films will view

The purpose of this research is to optically characterize the band gaps of sulfide-based chalcogenides and copper oxide thin films. The analysis on the copper oxide thin films will view the effects of various annealing temperatures and the analysis of the chalcogenides will view the effects of silver doping on the thin films. Using UV-Vis spectroscopy, parameters such as the absorption coefficient and determined which then provide details on the optical band gaps of these various semiconductors. With a better understanding of the bandgap of these materials, the behavior can be better predicted in fields of nanoionics and photonics.

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Date Created
  • 2020-12

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Exploring Pentagonal Geometries for Discovering Novel Two-Dimensional Materials

Description

Single-layer pentagonal materials have received limited attention compared with their counterparts with hexagonal structures. They are two-dimensional (2D) materials with pentagonal structures, that exhibit novel electronic, optical, or magnetic properties.

Single-layer pentagonal materials have received limited attention compared with their counterparts with hexagonal structures. They are two-dimensional (2D) materials with pentagonal structures, that exhibit novel electronic, optical, or magnetic properties. There are 15 types of pentagonal tessellations which allow plenty of options for constructing 2D pentagonal lattices. Few of them have been explored theoretically or experimentally. Studying this new type of 2D materials with density functional theory (DFT) will inspire the discovery of new 2D materials and open up applications of these materials in electronic and magnetic devices.In this dissertation, DFT is applied to discover novel 2D materials with pentagonal structures. Firstly, I examine the possibility of forming a 2D nanosheet with the vertices of type 15 pentagons occupied by boron, silicon, phosphorous, sulfur, gallium, germanium or tin atoms. I obtain different rearranged structures such as a single-layer gallium sheet with triangular patterns. Then the exploration expands to other 14 types of pentagons, leading to the discoveries of carbon nanosheets with Cairo tessellation (type 2/4 pentagons) and other patterns. The resulting 2D structures exhibit diverse electrical properties. Then I reveal the hidden Cairo tessellations in the pyrite structures and discover a family of planar 2D materials (such as PtP2), with a chemical formula of AB2 and space group pa ̄3. The combination of DFT and geometries opens up a novel route for the discovery of new 2D materials. Following this path, a series of 2D pentagonal materials such as 2D CoS2 are revealed with promising electronic and magnetic applications. Specifically, the DFT calculations show that CoS2 is an antiferromagnetic semiconductor with a band gap of 2.24 eV, and a N ́eel temperature of about 20 K. In order to enhance the superexchange interactions between the ions in this binary compound, I explore the ternary 2D pentagonal material CoAsS, that lacks the inversion symmetry. I find out CoAsS exhibits a higher Curie temperature of 95 K and a sizable piezoelectricity (d11=-3.52 pm/V). In addition to CoAsS, 34 ternary 2D pentagonal materials are discovered, among which I focus on FeAsS, that is a semiconductor showing strong magnetocrystalline anisotropy and sizable Berry curvature. Its magnetocrystalline anisotropy energy is 440 μeV/Fe ion, higher than many other 2D magnets that have been found.
Overall, this work not only provides insights into the structure-property relationship of 2D pentagonal materials and opens up a new route of studying 2D materials by combining geometry and computational materials science, but also shows the potential applications of 2D pentagonal materials in electronic and magnetic devices.

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Date Created
  • 2020

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MBE Growth and Characterization of III-V Bismide Semiconductor Alloys for Mid- and Long-Wave Infrared Applications

Description

The molecular beam epitaxy growth of the III-V semiconductor alloy indium arsenide antimonide bismide (InAsSbBi) is investigated over a range of growth temperatures and V/III flux ratios. Bulk and quantum

The molecular beam epitaxy growth of the III-V semiconductor alloy indium arsenide antimonide bismide (InAsSbBi) is investigated over a range of growth temperatures and V/III flux ratios. Bulk and quantum well structures grown on gallium antimonide (GaSb) substrates are examined. The relationships between Bi incorporation, surface morphology, growth temperature, and group-V flux are explored. A growth model is developed based on the kinetics of atomic desorption, incorporation, surface accumulation, and droplet formation. The model is applied to InAsSbBi, where the various process are fit to the Bi, Sb, and As mole fractions. The model predicts a Bi incorporation limit for lattice matched InAsSbBi grown on GaSb.The optical performance and bandgap energy of InAsSbBi is examined using photoluminescence spectroscopy. Emission is observed from low to room temperature with peaks ranging from 3.7 to 4.6 μm. The bandgap as function of temperature is determined from the first derivative maxima of the spectra fit to an Einstein single oscillator model. The photoluminescence spectra is observed to significantly broaden with Bi content as a result of lateral composition variations and the highly mismatched nature of Bi atoms, pairs, and clusters in the group-V sublattice.
A bowing model is developed for the bandgap and band offsets of the quinary alloy GaInAsSbBi and its quaternary constituents InAsSbBi and GaAsSbBi. The band anticrossing interaction due to the highly mismatched Bi atoms is incorporated into the relevant bowing terms. An algorithm is developed for the design of mid infrared GaInAsSbBi
quantum wells, with three degrees freedom to independently tune transition energy, in plane strain, and band edge offsets for desired electron and hole confinement.
The physical characteristics of the fundamental absorption edge of the relevant III-V binaries GaAs, GaSb, InAs, and InSb are examined using spectroscopic ellipsometry. A five parameter model is developed that describes the key physical characteristics of the absorption edge, including the bandgap energy, the Urbach tail, and the absorption coefficient at the bandgap.
The quantum efficiency and recombination lifetimes of bulk InAs0.911Sb0.089 grown by molecular beam epitaxy is investigated using excitation and temperature dependent steady state photoluminescence. The Shockley-Read-Hall, radiative, and Auger recombination lifetimes are determined.

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  • 2020