Matching Items (63)

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Capital Efficiency Metrics

Description

We gathered and analyzed key data from a wide-range of competitors in the foundry, fabless, and Integrated design manufacturing business. After detecting a downward trend in the return of invested capital (ROIC) and higher capital intensity of Company X, we

We gathered and analyzed key data from a wide-range of competitors in the foundry, fabless, and Integrated design manufacturing business. After detecting a downward trend in the return of invested capital (ROIC) and higher capital intensity of Company X, we searched for alternatives to turn this around. We conclude that, to decrease the net PPE of Company X, a sale-leaseback transaction would help Company X reduce their balance sheet and provided financing to advance their manufacturing capabilities.

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Date Created
2018-05

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Intel Collaborative Thesis, Substrate Group 2012

Description

Our thesis project aims to evaluate a major semiconductor company's (The Company) substrate supplier strategy in order to find the ideal number of suppliers that minimizes fixed cost and supplier power. With The Company spending roughly $2.2 billion annually on

Our thesis project aims to evaluate a major semiconductor company's (The Company) substrate supplier strategy in order to find the ideal number of suppliers that minimizes fixed cost and supplier power. With The Company spending roughly $2.2 billion annually on substrates, supplier strategy has a significant impact on their costs. As a general rule in micro processing, the circuitry of the processor becomes twice as dense every two years. The substrate, being the pathway through which the process or with the motherboard, must become more advanced as well, although the technology does not grow at nearly the same speed. Leading the way in their industry, The Company is at the forefront of technology and produces the world's most advanced processing units. The suppliers The Company purchases from must be innovators in their own respective fields in order to be capable of handling such "bleeding-edge" technology; this requires a supplier to make a commitment to continuously work towards meeting The Company's constantly changing technological requirements. The ultimate goal of this project is to determine the ideal number of substrate suppliers that balances the effects of production costs and buying power to give the company the best overall purchase price.

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Date Created
2012-05

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Wet NanoBonding of Semiconducting Surfaces Optimized via Surface Energy Modification using Three Liquid Contact Angle Analysis as a Metrology

Description

Semiconductor wafers are analyzed and their total surface energy γT is measured in three components according to the van Oss theory: (1) γLW, surface energy due to Lifshitz-van der Waals forces or dipole interactions, (2) γ+, surface energy due to

Semiconductor wafers are analyzed and their total surface energy γT is measured in three components according to the van Oss theory: (1) γLW, surface energy due to Lifshitz-van der Waals forces or dipole interactions, (2) γ+, surface energy due to interactions with electron donors, and (3) γ–, surface energy due to interactions with electron acceptors. Surface energy is measured via Three Liquid Contact Angle Analysis (3LCAA), a method of contact angle measurement using the sessile drop technique and three liquids: water, glycerin, and α-bromonaphthalene. This research optimizes the experimental methods of 3LCAA, proving that the technique produces reproducible measurements for surface energy on a variety of surfaces. Wafer surfaces are prepared via thermal oxidation, rapid thermal oxidation, ion beam oxidation, rapid thermal annealing, hydrofluoric acid etching, the RCA clean, the Herbots-Atluri (H-A) process, and the dry and wet anneals used for Dry and Wet NanoBonding™, respectively.
NanoBonding™ is a process for growing molecular bonds between semiconducting surfaces to create a hermetic seal. NanoBonding™ prevents fluid percolation, protecting integrated electronic sensors from corrosive mobile ion species such as sodium. This can extend the lifetime of marine sensors and glucose sensors from less than one week to over two years, dramatically reducing costs and improving quality of life for diabetic patients. Surface energy measurement is critical to understanding and optimizing NanoBonding™. Surface energies are modified through variations on the H-A process, and measured via 3LCAA. The majority of this research focuses on silicon oxide surfaces.
This is the first quantitative measurement of gallium arsenide surface energy in three components. GaAs is a III-V semiconductor with potential commercial use in transistors, but its oxide layer slowly evaporates over time. In subsequent research, 3LCAA may prove key to developing a stable GaAs oxide layer.

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2016-05

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Internet of Things Collaborative Project

Description

The purpose of this thesis was to design a market entrance strategy for Company X to enter the microcontroller (MCU) market within the Internet of Things (IoT). The five IoT segments are automotive; medical; retail; industrial; and military, aerospace, and

The purpose of this thesis was to design a market entrance strategy for Company X to enter the microcontroller (MCU) market within the Internet of Things (IoT). The five IoT segments are automotive; medical; retail; industrial; and military, aerospace, and government. To reach a final decision, we will research the markets, analyze make versus buy scenarios, and deliver a financial analysis on the chosen strategy. Based on the potential financial benefits and compatibility with Company X's current business model, we recommend that Company X enter the automotive segment through mergers & acquisitions (M&A). After analyzing the supply chain structure of the automotive IoT, we advise Company X to acquire Freescale Semiconductor for $46.98 per share.

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Date Created
2015-05

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High Efficiency Electronics for Space Applications

Description

The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with

The Metal Semiconductor Field Effect Transistor (MESFET) has high potential to enter analog and RF applications due to their high breakdown voltage and switching frequency characteristics. These MESFET devices could allow for high voltage analog circuits to be integrated with low voltage digital circuits on a single chip in an extremely cost effective way. Higher integration leads to electronics with increased functionality and a smaller finished product. The MESFETs are designed in-house by the research group led by Dr. Trevor Thornton. The layouts are then sent to multi-project wafer (MPW) integrated circuit foundry companies, such as the Metal Oxide Semiconductor Implementation Service (MOSIS) to be fabricated. Once returned, the electrical characteristics of the devices are measured. The MESFET has been implemented in various applications by the research group, including the low dropout linear regulator (LDO) and RF power amplifier. An advantage of the MESFET is that it can function in extreme environments such as space, allowing for complex electrical systems to continue functioning properly where traditional transistors would fail.

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Date Created
2015-05

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Foundry Opportunities

Description

Company X is one of the world's largest semiconductor companies in the world, having a current market capitalization of 177.44 Billion USD, an enterprise value of 173.6 Billion USD, and generated 52.7 billion USD in revenue in fiscal year 2013.

Company X is one of the world's largest semiconductor companies in the world, having a current market capitalization of 177.44 Billion USD, an enterprise value of 173.6 Billion USD, and generated 52.7 billion USD in revenue in fiscal year 2013. Recently, Company X has been looking to expand its Foundry business. The Foundry business in the semiconductor business is the actual process of making the chips. This process can be approached in several different ways by companies who need their chips built. A company, like TSMC, can be considered a pure-play company and only makes chips for other companies. A fabless company, like Apple, creates its own chip design and then allows another company to build them. It also uses other chip designs for its products, but outsources the building to another company. Lastly, the integrated device manufacturing companies like Samsung or Company X both design and build the chip. The foundry industry is a rather novel market for Company X because it owns less than 1 percent of the market. However, the industry itself is rather large, generating a total of 40 billion dollars in revenue annually, with expectations to have increasing year over year growth into the foreseeable future. The industry is fairly concentrated with TSMC being the top competitor, owning roughly 50 percent of the market with Samsung and Global Foundries lagging behind as notable competitors. It is a young industry and there is potential opportunity for companies that want to get into the business. For Company X, it is not only another market to get into, but also an added business segment to supplant their business segments that are forecasted to do poorly in the near future. This thesis will analyze the financial opportunity for Company X in the foundry space. Our final product is a series of P&L's which illustrate our findings. The results of our analysis were presented and defended in front of a panel of Company X managers and executives.

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Created

Date Created
2015-05

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Determination of electrostatic potential and charge distribution of semiconductor nanostructures using off-axis electron holography

Description

The research of this dissertation involved quantitative characterization of electrostatic potential and charge distribution of semiconductor nanostructures using off-axis electron holography, as well as other electron microscopy techniques. The investigated nanostructures included Ge quantum dots, Ge/Si core/shell nanowires, and polytype

The research of this dissertation involved quantitative characterization of electrostatic potential and charge distribution of semiconductor nanostructures using off-axis electron holography, as well as other electron microscopy techniques. The investigated nanostructures included Ge quantum dots, Ge/Si core/shell nanowires, and polytype heterostructures in ZnSe nanobelts. Hole densities were calculated for the first two systems, and the spontaneous polarization for wurtzite ZnSe was determined. Epitaxial Ge quantum dots (QDs) embedded in boron-doped silicon were studied. Reconstructed phase images showed extra phase shifts near the base of the QDs, which was attributed to hole accumulation in these regions. The resulting charge density was (0.03±0.003) holes
m3, which corresponded to about 30 holes localized to a pyramidal, 25-nm-wide Ge QD. This value was in reasonable agreement with the average number of holes confined to each Ge dot determined using a capacitance-voltage measurement. Hole accumulation in Ge/Si core/shell nanowires was observed and quantified using off-axis electron holography and other electron microscopy techniques. High-angle annular-dark-field scanning transmission electron microscopy images and electron holograms were obtained from specific nanowires. The intensities of the former were utilized to calculate the projected thicknesses for both the Ge core and the Si shell. The excess phase shifts measured by electron holography across the nanowires indicated the presence of holes inside the Ge cores. The hole density in the core regions was calculated to be (0.4±0.2)
m3 based on a simplified coaxial cylindrical model. Homogeneous zincblende/wurtzite heterostructure junctions in ZnSe nanobelts were studied. The observed electrostatic fields and charge accumulation were attributed to spontaneous polarization present in the wurtzite regions since the contributions from piezoelectric polarization were shown to be insignificant based on geometric phase analysis. The spontaneous polarization for the wurtzite ZnSe was calculated to be psp = -(0.0029±0.00013) C/m2, whereas a first principles' calculation gave psp = -0.0063 C/m2. The atomic arrangements and polarity continuity at the zincblende/wurtzite interface were determined through aberration-corrected high-angle annular-dark-field imaging, which revealed no polarity reversal across the interface. Overall, the successful outcomes of these studies confirmed the capability of off-axis electron holography to provide quantitative electrostatic information for nanostructured materials.

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Date Created
2011

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Growth of gaN nanowires: a study using in situ transmission electron microscopy

Description

Owing to their special characteristics, group III-Nitride semiconductors have attracted special attention for their application in a wide range of optoelectronic devices. Of particular interest are their direct and wide band gaps that span from ultraviolet to the infrared wavelengths.

Owing to their special characteristics, group III-Nitride semiconductors have attracted special attention for their application in a wide range of optoelectronic devices. Of particular interest are their direct and wide band gaps that span from ultraviolet to the infrared wavelengths. In addition, their stronger bonds relative to the other compound semiconductors makes them thermally more stable, which provides devices with longer life time. However, the lattice mismatch between these semiconductors and their substrates cause the as-grown films to have high dislocation densities, reducing the life time of devices that contain these materials. One possible solution for this problem is to substitute single crystal semiconductor nanowires for epitaxial films. Due to their dimensionality, semiconductor nanowires typically have stress-free surfaces and better physical properties. In order to employ semiconductor nanowires as building blocks for nanoscale devices, a precise control of the nanowires' crystallinity, morphology, and chemistry is necessary. This control can be achieved by first developing a deeper understanding of the processes involved in the synthesis of nanowires, and then by determining the effects of temperature and pressure on their growth. This dissertation focuses on understanding of the growth processes involved in the formation of GaN nanowires. Nucleation and growth events were observed in situ and controlled in real-time using an environmental transmission electron microscope. These observations provide a satisfactory elucidation of the underlying growth mechanism during the formation of GaN nanowires. Nucleation of these nanowires appears to follow the vapor-liquid-solid mechanism. However, nanowire growth is found to follow both the vapor-liquid-solid and vapor-solid-solid mechanisms. Direct evidence of the effects of III/V ratio on nanowire growth is also reported, which provides important information for tailoring the synthesis of GaN nanowires. These findings suggest in situ electron microscopy is a powerful tool to understand the growth of GaN nanowires and also that these experimental approach can be extended to study other binary semiconductor compound such as GaP, GaAs, and InP, or even ternary compounds such as InGaN. However, further experimental work is required to fully elucidate the kinetic effects on the growth process. A better control of the growth parameters is also recommended.

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Date Created
2010

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Growth, characterization, and thermodynamics of III-nitride semiconductors

Description

III-nitride alloys are wide band gap semiconductors with a broad range of applications in optoelectronic devices such as light emitting diodes and laser diodes. Indium gallium nitride light emitting diodes have been successfully produced over the past decade. But the

III-nitride alloys are wide band gap semiconductors with a broad range of applications in optoelectronic devices such as light emitting diodes and laser diodes. Indium gallium nitride light emitting diodes have been successfully produced over the past decade. But the progress of green emission light emitting devices has been limited by the incorporation of indium in the alloy, mainly due to phase separation. This difficulty could be addressed by studying the growth and thermodynamics of these alloys. Knowledge of thermodynamic phase stabilities and of pressure - temperature - composition phase diagrams is important for an understanding of the boundary conditions of a variety of growth techniques. In this dissertation a study of the phase separation of indium gallium nitride is conducted using a regular solution model of the ternary alloy system. Graphs of Gibbs free energy of mixing were produced for a range of temperatures. Binodal and spinodal decomposition curves show the stable and unstable regions of the alloy in equilibrium. The growth of gallium nitride and indium gallium nitride was attempted by the reaction of molten gallium - indium alloy with ammonia at atmospheric pressure. Characterization by X-ray diffraction, photoluminescence, and secondary electron microscopy show that the samples produced by this method contain only gallium nitride in the hexagonal phase. The instability of indium nitride at the temperatures required for activation of ammonia accounts for these results. The photoluminescence spectra show a correlation between the intensity of a broad green emission, related to native defects, and indium composition used in the molten alloy. A different growth method was used to grow two columnar-structured gallium nitride films using ammonium chloride and gallium as reactants and nitrogen and ammonia as carrier gasses. Investigation by X-ray diffraction and spatially-resolved cathodoluminescence shows the film grown at higher temperature to be primarily hexagonal with small quantities of cubic crystallites, while the one grown at lower temperature to be pure hexagonal. This was also confirmed by low temperature photoluminescence measurements. The results presented here show that cubic and hexagonal crystallites can coexist, with the cubic phase having a much sharper and stronger luminescence. Controlled growth of the cubic phase GaN crystallites can be of use for high efficiency light detecting and emitting devices. The ammonolysis of a precursor was used to grow InGaN powders with different indium composition. High purity hexagonal GaN and InN were obtained. XRD spectra showed complete phase separation for samples with x < 30%, with ~ 9% indium incorporation in the 30% sample. The presence of InGaN in this sample was confirmed by PL measurements, where luminescence from both GaN and InGaN band edge are observed. The growth of higher indium compositions samples proved to be difficult, with only the presence of InN in the sample. Nonetheless, by controlling parameters like temperature and time may lead to successful growth of this III-nitride alloy by this method.

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Date Created
2011

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Hafnium oxide as an alternative barrier to aluminum oxide for thermally stable niobium tunnel junctions

Description

In this research, our goal was to fabricate Josephson junctions that can be stably processed at 300°C or higher. With the purpose of integrating Josephson junction fabrication with the current semiconductor circuit fabrication process, back-end process temperatures (>350 °C) will

In this research, our goal was to fabricate Josephson junctions that can be stably processed at 300°C or higher. With the purpose of integrating Josephson junction fabrication with the current semiconductor circuit fabrication process, back-end process temperatures (>350 °C) will be a key for producing large scale junction circuits reliably, which requires the junctions to be more thermally stable than current Nb/Al-AlOx/Nb junctions. Based on thermodynamics, Hf was chosen to produce thermally stable Nb/Hf-HfOx/Nb superconductor tunnel Josephson junctions that can be grown or processed at elevated temperatures. Also elevated synthesis temperatures improve the structural and electrical properties of Nb electrode layers that could potentially improve junction device performance. The refractory nature of Hf, HfO2 and Nb allow for the formation of flat, abrupt and thermally-stable interfaces. But the current Al-based barrier will have problems when using with high-temperature grown and high-quality Nb. So our work is aimed at using Nb grown at elevated temperatures to fabricate thermally stable Josephson tunnel junctions. As a junction barrier metal, Hf was studied and compared with the traditional Al-barrier material. We have proved that Hf-HfOx is a good barrier candidate for high-temperature synthesized Josephson junction. Hf deposited at 500 °C on Nb forms flat and chemically abrupt interfaces. Nb/Hf-HfOx/Nb Josephson junctions were synthesized, fabricated and characterized with different oxidizing conditions. The results of materials characterization and junction electrical measurements are reported and analyzed. We have improved the annealing stability of Nb junctions and also used high-quality Nb grown at 500 °C as the bottom electrode successfully. Adding a buffer layer or multiple oxidation steps improves the annealing stability of Josephson junctions. We also have attempted to use the Atomic Layer Deposition (ALD) method for the growth of Hf oxide as the junction barrier and got tunneling results.

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Date Created
2013