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Description
A proposed visible spectrum nanoscale imaging method requires material with permittivity values much larger than those available in real world materials to shrink the visible wavelength to attain the desired resolution. It has been proposed that the extraordinarily slow propagation experienced by light guided along plasmon resonant structures is a viable approach to obtaining these short wavelengths. To assess the feasibility of such a system, an effective medium model of a chain of Noble metal plasmonic nanospheres is developed, leading to a straightforward calculation of the waveguiding properties. Evaluation of other models for such structures that have appeared in the literature, including an eigenvalue problem nearest neighbor approximation, a multi- neighbor approximation with retardation, and a method-of-moments method for a finite chain, show conflicting expectations of such a structure. In particular, recent publications suggest the possibility of regions of invalidity for eigenvalue problem solutions that are considered far below the onset of guidance, and for solutions that assume the loss is low enough to justify perturbation approximations. Even the published method-of-moments approach suffers from an unjustified assumption in the original interpretation, leading to overly optimistic estimations of the attenuation of the plasmon guided wave. In this work it is shown that the method of moments approach solution was dominated by the radiation from the source dipole, and not the waveguiding behavior claimed. If this dipolar radiation is removed the remaining fields ought to contain the desired guided wave information. Using a Prony's-method-based algorithm the dispersion properties of the chain of spheres are assessed at two frequencies, and shown to be dramatically different from the optimistic expectations in much of the literature. A reliable alternative to these models is to replace the chain of spheres with an effective medium model, thus mapping the chain problem into the well-known problem of the dielectric rod. The solution of the Green function problem for excitation of the symmetric longitudinal mode (TM01) is performed by numerical integration. Using this method the frequency ranges over which the rod guides and the associated attenuation are clearly seen. The effective medium model readily allows for variation of the sphere size and separation, and can be taken to the limit where instead of a chain of spheres we have a solid Noble metal rod. This latter case turns out to be the optimal for minimizing the attenuation of the guided wave. Future work is proposed to simulate the chain of photonic nanospheres and the nanowire using finite-difference time-domain to verify observed guided behavior in the Green's function method devised in this thesis and to simulate the proposed nanosensing devices.
ContributorsHale, Paul (Author) / Diaz, Rodolfo E (Thesis advisor) / Goodnick, Stephen (Committee member) / Aberle, James T., 1961- (Committee member) / Palais, Joseph (Committee member) / Arizona State University (Publisher)
Created2013
Description
There is a pervasive need in the defense industry for conformal, low-profile, efficient and broadband (HF-UHF) antennas. Broadband capabilities enable shared aperture multi-function radiators, while conformal antenna profiles minimize physical damage in army applications, reduce drag and weight penalties in airborne applications and reduce the visual and RF signatures of the communication node. This dissertation is concerned with a new class of antennas called Magneto-Dielectric wire antennas (MDWA) that provide an ideal solution to this ever-present and growing need. Magneto-dielectric structures (μr>1;εr>1) can partially guide electromagnetic waves and radiate them by leaking off the structure or by scattering from any discontinuities, much like a metal antenna of the same shape. They are attractive alternatives to conventional whip and blade antennas because they can be placed conformal to a metallic ground plane without any performance penalty. A two pronged approach is taken to analyze MDWAs. In the first, antenna circuit models are derived for the prototypical dipole and loop elements that include the effects of realistic dispersive magneto-dielectric materials of construction. A material selection law results, showing that: (a) The maximum attainable efficiency is determined by a single magnetic material parameter that we term the hesitivity: Closely related to Snoek's product, it measures the maximum magnetic conductivity of the material. (b) The maximum bandwidth is obtained by placing the highest amount of μ" loss in the frequency range of operation. As a result, high radiation efficiency antennas can be obtained not only from the conventional low loss (low μ") materials but also with highly lossy materials (tan(δm)>>1). The second approach used to analyze MDWAs is through solving the Green function problem of the infinite magneto-dielectric cylinder fed by a current loop. This solution sheds light on the leaky and guided waves supported by the magneto-dielectric structure and leads to useful design rules connecting the permeability of the material to the cross sectional area of the antenna in relation to the desired frequency of operation. The Green function problem of the permeable prolate spheroidal antenna is also solved as a good approximation to a finite cylinder.
ContributorsSebastian, Tom (Author) / Diaz, Rodolfo E (Thesis advisor) / Pan, George (Committee member) / Aberle, James T., 1961- (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2013
Description
The medical industry has benefited greatly by electronic integration resulting in the explosive growth of active medical implants. These devices often treat and monitor chronic health conditions and require very minimal power usage. A key part of these medical implants is an ultra-low power two way wireless communication system. This enables both control of the implant as well as relay of information collected. This research has focused on a high performance receiver for medical implant applications. One commonly quoted specification to compare receivers is energy per bit required. This metric is useful, but incomplete in that it ignores Sensitivity level, bit error rate, and immunity to interferers. In this study exploration of receiver architectures and convergence upon a comprehensive solution is done. This analysis is used to design and build a system for validation. The Direct Conversion Receiver architecture implemented for the MICS standard in 0.18 µm CMOS process consumes approximately 2 mW is competitive with published research.
ContributorsStevens, Mark (Author) / Kiaei, Sayfe (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Aberle, James T., 1961- (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2012
Description
This thesis presents approaches to develop micro seismometers and accelerometers based on molecular electronic transducers (MET) technology using MicroElectroMechanical Systems (MEMS) techniques. MET is a technology applied in seismic instrumentation that proves highly beneficial to planetary seismology. It consists of an electrochemical cell that senses the movement of liquid electrolyte between electrodes by converting it to the output current. MET seismometers have advantages of high sensitivity, low noise floor, small size, absence of fragile mechanical moving parts and independence on the direction of sensitivity axis. By using MEMS techniques, a micro MET seismometer is developed with inter-electrode spacing close to 1μm, which improves the sensitivity of fabricated device to above 3000 V/(m/s^2) under operating bias of 600 mV and input acceleration of 400 μG (G=9.81m/s^2) at 0.32 Hz. The lowered hydrodynamic resistance by increasing the number of channels improves the self-noise to -127 dB equivalent to 44 nG/√Hz at 1 Hz. An alternative approach to build the sensing element of MEMS MET seismometer using SOI process is also presented in this thesis. The significantly increased number of channels is expected to improve the noise performance. Inspired by the advantages of combining MET and MEMS technologies on the development of seismometer, a low frequency accelerometer utilizing MET technology with post-CMOS-compatible fabrication processes is developed. In the fabricated accelerometer, the complicated fabrication of mass-spring system in solid-state MEMS accelerometer is replaced with a much simpler post-CMOS-compatible process containing only deposition of a four-electrode MET structure on a planar substrate, and a liquid inertia mass of an electrolyte droplet encapsulated by oil film. The fabrication process does not involve focused ion beam milling which is used in the micro MET seismometer fabrication, thus the cost is lowered. Furthermore, the planar structure and the novel idea of using an oil film as the sealing diaphragm eliminate the complicated three-dimensional packaging of the seismometer. The fabricated device achieves 10.8 V/G sensitivity at 20 Hz with nearly flat response over the frequency range from 1 Hz to 50 Hz, and a low noise floor of 75 μG/√Hz at 20 Hz.
ContributorsHuang, Hai (Author) / Yu, Hongyu (Thesis advisor) / Jiang, Hanqing (Committee member) / Dai, Lenore (Committee member) / Si, Jennie (Committee member) / Arizona State University (Publisher)
Created2014
Description
Due to diminishing availability of 3He, which is the critical component of neutron detecting proportional counters, large area flexible arrays are being considered as a potential replacement for neutron detection. A large area flexible array, utilizing semiconductors for both charged particle detection and pixel readout, ensures a large detection surface area in a light weight rugged form. Such a neutron detector could be suitable for deployment at ports of entry. The specific approach used in this research, uses a neutron converter layer which captures incident thermal neutrons, and then emits ionizing charged particles. These ionizing particles cause electron-hole pair generation within a single pixel's integrated sensing diode. The resulting charge is then amplified via a low-noise amplifier. This document begins by discussing the current state of the art in neutron detection and the associated challenges. Then, for the purpose of resolving some of these issues, recent design and modeling efforts towards developing an improved neutron detection system are described. Also presented is a low-noise active pixel sensor (APS) design capable of being implemented in low temperature indium gallium zinc oxide (InGaZnO) or amorphous silicon (a-Si:H) thin film transistor process compatible with plastic substrates. The low gain and limited scalability of this design are improved upon by implementing a new multi-stage self-resetting APS. For each APS design, successful radiation measurements are also presented using PiN diodes for charged particle detection. Next, detection array readout methodologies are modeled and analyzed, and use of a matched filter readout circuit is described as well. Finally, this document discusses detection diode integration with the designed TFT-based APSs.
ContributorsKunnen, George (Author) / Allee, David (Thesis advisor) / Garrity, Douglas (Committee member) / Gnade, Bruce (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2014
Description
Modern day deep sub-micron SOC architectures often demand very low supply noise levels. As supply voltage decreases with decreasing deep sub-micron gate length, noise on the power supply starts playing a dominant role in noise-sensitive analog blocks, especially high precision ADC, PLL, and RF SOC's. Most handheld and portable applications and highly sensitive medical instrumentation circuits tend to use low noise regulators as on-chip or on board power supply. Nonlinearities associated with LNA's, mixers and oscillators up-convert low frequency noise with the signal band. Specifically, synthesizer and TCXO phase noise, LNA and mixer noise figure, and adjacent channel power ratios of the PA are heavily influenced by the supply noise and ripple. This poses a stringent requirement on a very low noise power supply with high accuracy and fast transient response. Low Dropout (LDO) regulators are preferred over switching regulators for these applications due to their attractive low noise and low ripple features. LDO's shield sensitive blocks from high frequency fluctuations on the power supply while providing high accuracy, fast response supply regulation.
This research focuses on developing innovative techniques to reduce the noise of any generic wideband LDO, stable with or without load capacitor. The proposed techniques include Switched RC Filtering to reduce the Bandgap Reference noise, Current Mode Chopping to reduce the Error Amplifier noise & MOS-R based RC filter to reduce the noise due to bias current. The residual chopping ripple was reduced using a Switched Capacitor notch filter. Using these techniques, the integrated noise of a wideband LDO was brought down to 15µV in the integration band of 10Hz to 100kHz. These techniques can be integrated into any generic LDO without any significant area overhead.
This research focuses on developing innovative techniques to reduce the noise of any generic wideband LDO, stable with or without load capacitor. The proposed techniques include Switched RC Filtering to reduce the Bandgap Reference noise, Current Mode Chopping to reduce the Error Amplifier noise & MOS-R based RC filter to reduce the noise due to bias current. The residual chopping ripple was reduced using a Switched Capacitor notch filter. Using these techniques, the integrated noise of a wideband LDO was brought down to 15µV in the integration band of 10Hz to 100kHz. These techniques can be integrated into any generic LDO without any significant area overhead.
ContributorsMagod Ramakrishna, Raveesh (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2014
Description
A new loop configuration capable of reducing power radiation magnitudes lower than conventional loops has been developed. This configuration is demonstrated for the case of two coaxial loops of 0.1 meter radius coupled via the magnetic reactive field. Utilizing electromagnetism theory, techniques from antenna design and a new near field design initiative, the ability to design a magnetic field has been investigated by using a full wave simulation tool. The method for realization is initiated from first order physics model, ADS and onto a full wave situation tool for the case of a non-radiating helical loop. The exploration into the design of a magnetic near field while mitigating radiation power is demonstrated using an real number of twists to form a helical wire loop while biasing the integer twisted loop in a non-conventional moebius termination. The helix loop setup as a moebius loop convention can also be expressed as a shorted antenna scheme. The 0.1 meter radius helix antenna is biased with a 1MHz frequency that categorized the antenna loop as electrically small. It is then demonstrated that helical configuration reduces the electric field and mitigates power radiation into the far field. In order to compare the radiated power reduction performance of the helical loop a shielded loop is used as a baseline for comparison. The shielded loop system of the same geometric size and frequency is shown to have power radiation expressed as -46.1 dBm. The power radiated mitigation method of the helix loop reduces the power radiated from the two loop system down to -98.72 dBm.
ContributorsMoreno, Fernando (Author) / Diaz, Rodolfo (Thesis advisor) / Aberle, James T., 1961- (Committee member) / Kozicki, Michael (Committee member) / Arizona State University (Publisher)
Created2015
Description
Several state of the art, monitoring and control systems, such as DC motor
controllers, power line monitoring and protection systems, instrumentation systems and battery monitors require direct digitization of a high voltage input signals. Analog-to-Digital Converters (ADCs) that can digitize high voltage signals require high linearity and low voltage coefficient capacitors. A built in self-calibration and digital-trim algorithm correcting static mismatches in Capacitive Digital-to-Analog Converter (CDAC) used in Successive Approximation Register Analog to Digital Converters (SARADCs) is proposed. The algorithm uses a dynamic error correction (DEC) capacitor to cancel the static errors occurring in each capacitor of the array as the first step upon power-up and eliminates the need for an extra calibration DAC. Self-trimming is performed digitally during normal ADC operation. The algorithm is implemented on a 14-bit high-voltage input range SAR ADC with integrated dynamic error correction capacitors. The IC is fabricated in 0.6-um high voltage compliant CMOS process, accepting up to 24Vpp differential input signal. The proposed approach achieves 73.32 dB Signal to Noise and Distortion Ratio (SNDR) which is an improvement of 12.03 dB after self-calibration at 400 kS/s sampling rate, consuming 90-mW from a +/-15V supply. The calibration circuitry occupies 28% of the capacitor DAC, and consumes less than 15mW during operation. Measurement results shows that this algorithm reduces INL from as high as 7 LSBs down to 1 LSB and it works even in the presence of larger mismatches exceeding 260 LSBs. Similarly, it reduces DNL errors from 10 LSBs down to 1 LSB. The ADC occupies an active area of 9.76 mm2.
controllers, power line monitoring and protection systems, instrumentation systems and battery monitors require direct digitization of a high voltage input signals. Analog-to-Digital Converters (ADCs) that can digitize high voltage signals require high linearity and low voltage coefficient capacitors. A built in self-calibration and digital-trim algorithm correcting static mismatches in Capacitive Digital-to-Analog Converter (CDAC) used in Successive Approximation Register Analog to Digital Converters (SARADCs) is proposed. The algorithm uses a dynamic error correction (DEC) capacitor to cancel the static errors occurring in each capacitor of the array as the first step upon power-up and eliminates the need for an extra calibration DAC. Self-trimming is performed digitally during normal ADC operation. The algorithm is implemented on a 14-bit high-voltage input range SAR ADC with integrated dynamic error correction capacitors. The IC is fabricated in 0.6-um high voltage compliant CMOS process, accepting up to 24Vpp differential input signal. The proposed approach achieves 73.32 dB Signal to Noise and Distortion Ratio (SNDR) which is an improvement of 12.03 dB after self-calibration at 400 kS/s sampling rate, consuming 90-mW from a +/-15V supply. The calibration circuitry occupies 28% of the capacitor DAC, and consumes less than 15mW during operation. Measurement results shows that this algorithm reduces INL from as high as 7 LSBs down to 1 LSB and it works even in the presence of larger mismatches exceeding 260 LSBs. Similarly, it reduces DNL errors from 10 LSBs down to 1 LSB. The ADC occupies an active area of 9.76 mm2.
ContributorsThirunakkarasu, Shankar (Author) / Bakkaloglu, Bertan (Thesis advisor) / Garrity, Douglas (Committee member) / Kozicki, Michael (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2014
Description
This dissertation presents my work on development of deformable electronics using microelectromechanical systems (MEMS) based fabrication technologies. In recent years, deformable electronics are coming to revolutionize the functionality of microelectronics seamlessly with their application environment, ranging from various consumer electronics to bio-medical applications. Many researchers have studied this area, and a wide variety of devices have been fabricated. One traditional way is to directly fabricate electronic devices on flexible substrate through low-temperature processes. These devices suffered from constrained functionality due to the temperature limit. Another transfer printing approach has been developed recently. The general idea is to fabricate functional devices on hard and planar substrates using standard processes then transferred by elastomeric stamps and printed on desired flexible and stretchable substrates. The main disadvantages are that the transfer printing step may limit the yield. The third method is "flexible skins" which silicon substrates are thinned down and structured into islands and sandwiched by two layers of polymer. The main advantage of this method is post CMOS compatible. Based on this technology, we successfully fabricated a 3-D flexible thermal sensor for intravascular flow monitoring. The final product of the 3-D sensor has three independent sensing elements equally distributed around the wall of catheter (1.2 mm in diameter) with 120° spacing. This structure introduces three independent information channels, and cross-comparisons among all readings were utilized to eliminate experimental error and provide better measurement results. The novel fabrication and assembly technology can also be applied to other catheter based biomedical devices. A step forward inspired by the ancient art of folding, origami, which creating three-dimensional (3-D) structures from two-dimensional (2-D) sheets through a high degree of folding along the creases. Based on this idea, we developed a novel method to enable better deformability. One example is origami-enabled silicon solar cells. The solar panel can reach up to 644% areal compactness while maintain reasonable good performance (less than 30% output power density drop) upon 40 times cyclic folding/unfolding. This approach can be readily applied to other functional devices, ranging from sensors, displays, antenna, to energy storage devices.
ContributorsTang, Rui (Author) / Yu, Hongyu (Thesis advisor) / Jiang, Hanqing (Committee member) / Pan, George (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2014
Description
In this work, a highly sensitive strain sensing technique is developed to realize in-plane strain mapping for microelectronic packages or emerging flexible or foldable devices, where mechanical or thermal strain is a major concern that could affect the performance of the working devices or even lead to the failure of the devices. Therefore strain sensing techniques to create a contour of the strain distribution is desired.
The developed highly sensitive micro-strain sensing technique differs from the existing strain mapping techniques, such as digital image correlation (DIC)/micro-Moiré techniques, in terms of working mechanism, by filling a technology gap that requires high spatial resolution while simultaneously maintaining a large field-of-view. The strain sensing mechanism relies on the scanning of a tightly focused laser beam onto the grating that is on the sample surface to detect the change in the diffracted beam angle as a result of the strain. Gratings are fabricated on the target substrates to serve as strain sensors, which carries the strain information in the form of variations in the grating period. The geometric structure of the optical system inherently ensures the high sensitivity for the strain sensing, where the nanoscale change of the grating period is amplified by almost six orders into a diffraction peak shift on the order of several hundred micrometers. It significantly amplifies the small signal measurements so that the desired sensitivity and accuracy can be achieved.
The important features, such as strain sensitivity and spatial resolution, for the strain sensing technique are investigated to evaluate the technique. The strain sensitivity has been validated by measurements on homogenous materials with well known reference values of CTE (coefficient of thermal expansion). 10 micro-strain has been successfully resolved from the silicon CTE extraction measurements. Furthermore, the spatial resolution has been studied on predefined grating patterns, which are assembled to mimic the uneven strain distribution across the sample surface. A resolvable feature size of 10 µm has been achieved with an incident laser spot size of 50 µm in diameter.
In addition, the strain sensing technique has been applied to a composite sample made of SU8 and silicon, as well as the microelectronic packages for thermal strain mappings.
The developed highly sensitive micro-strain sensing technique differs from the existing strain mapping techniques, such as digital image correlation (DIC)/micro-Moiré techniques, in terms of working mechanism, by filling a technology gap that requires high spatial resolution while simultaneously maintaining a large field-of-view. The strain sensing mechanism relies on the scanning of a tightly focused laser beam onto the grating that is on the sample surface to detect the change in the diffracted beam angle as a result of the strain. Gratings are fabricated on the target substrates to serve as strain sensors, which carries the strain information in the form of variations in the grating period. The geometric structure of the optical system inherently ensures the high sensitivity for the strain sensing, where the nanoscale change of the grating period is amplified by almost six orders into a diffraction peak shift on the order of several hundred micrometers. It significantly amplifies the small signal measurements so that the desired sensitivity and accuracy can be achieved.
The important features, such as strain sensitivity and spatial resolution, for the strain sensing technique are investigated to evaluate the technique. The strain sensitivity has been validated by measurements on homogenous materials with well known reference values of CTE (coefficient of thermal expansion). 10 micro-strain has been successfully resolved from the silicon CTE extraction measurements. Furthermore, the spatial resolution has been studied on predefined grating patterns, which are assembled to mimic the uneven strain distribution across the sample surface. A resolvable feature size of 10 µm has been achieved with an incident laser spot size of 50 µm in diameter.
In addition, the strain sensing technique has been applied to a composite sample made of SU8 and silicon, as well as the microelectronic packages for thermal strain mappings.
ContributorsLiang, Hanshuang (Author) / Yu, Hongbin (Thesis advisor) / Poon, Poh Chieh Benny (Committee member) / Jiang, Hanqing (Committee member) / Zhang, Yong-Hang (Committee member) / Arizona State University (Publisher)
Created2014