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- All Subjects: Electrical Engineering
- Creators: Vasileska, Dragica
Description
Wide bandgap semiconductors, also known as WBG semiconductors are materials which have larger bandgaps than conventional semiconductors such as Si or GaAs. They permit devices to operate at much higher voltages, frequencies and temperatures. They are the key material used to make LEDs, lasers, radio frequency applications, military applications, and power electronics. Their intrinsic qualities make them promising for next-generation devices for general semiconductor use. Their ability to handle higher power density is particularly attractive for attempts to sustain Moore's law, as conventional technologies appear to be reaching a bottleneck. Apart from WBG materials, ultra-wide bandgap (UWBG) materials, such as Ga2O3, AlN, diamond, or BN, are also attractive since they have even more extreme properties. Although this field is relatively new, which still remains a lot of effort to study and investigate, people can still expect that these materials could be the main characters for more advanced applications in the near future.
In the dissertation, three topics with power devices made by WBG or UWBG semiconductors were introduced. In chapter 1, a generally background knowledge introduction is given. This helps the reader to learn current research focuses. In chapter 2, a comprehensive study of temperature-dependent characteristics of Ga2O3 SBDs with highly-doped substrate is demonstrated. A modified thermionic emission model over an inhomogeneous barrier with a voltage-dependent barrier height is investigated. Besides, the mechanism of surface leakage current is also discussed. These results are beneficial for future developments of low-loss β-Ga2O3 electronics and optoelectronics. In chapter 3, vertical GaN Schottky barrier diodes (SBDs) with floating metal rings (FMRs) as edge termination structures on bulk GaN substrates was introduced. This work represents a useful reference for the FMR termination design for GaN power devices. In chapter 4, AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MISHEMTs) fabricated on Si substrates with a 10 nm boron nitride (BN) layer as gate dielectric was demonstrated. The material characterization was investigated by X-ray photoelectric spectroscopy (XPS) and UV photoelectron spectroscopy (UPS). And the gate leakage current mechanisms were also investigated by temperature-dependent current-voltage measurements.
Although still in its infancy, past and projected future progress of electronic designs will ultimately achieve this very goal that WBG and UWBG semiconductors will be indispensable for today and future’s science, technologies and society.
ContributorsYang, Tsung-Han (Author) / Zhao, Yuji (Thesis advisor) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Nemanich, Robert (Committee member) / Arizona State University (Publisher)
Created2021
Description
Wurtzite (B, Ga, Al) N semiconductors, especially (Ga, Al) N material systems, demonstrate immense promises to boost the economic growth in the semiconductor industry that is approaching the end of Moore’s law. At the material level, their high electric field strength, high saturation velocity, and unique heterojunction polarization charge have enabled tremendous potentials for high power, high frequency, and photonic applications. With the availability of large-area bulk GaN substrates and high-quality epilayer on foreign substrates, the power conversion applications of GaN are now at the cusp of commercialization.Despite these encouraging advances, there remain two critical hurdles in GaN-based technology: selective area doping and hole-based p-channel devices. Current selective area doping methods are still immature and lead to low-quality lateral p-n junctions, which prevent the realization of advanced power transistors and rectifiers. The missing of hole-based p-channel devices hinders the development of GaN complementary integrated circuits.
This thesis comprehensively studied these challenges. The first part (chapter 2) researched the selective area doping by etch-then-regrow. A GaN-based vertical-channel junction field-effect transistors (VC-JFETs) was experimentally demonstrated by blanket regrowth and self-planarization. The devices’ electrical performances were characterized to understand the regrowth quality. The non-ideal factors during p-GaN regrowth were also discussed. The second part (chapter 3-5) systematically studied the application of the hydrogen plasma treatment process to change the p-GaN properties selectively. A novel GaN-based metal-insulator-semiconductor junction was demonstrated. Then a novel edge termination design with avalanche breakdown capability achieved in GaN power rectifiers is proposed. The last part (Chapter 6) demonstrated a GaN-based p-channel heterojunction field-effect transistor, with record low leakage, subthreshold swing, and a record high on/off ratio. In the end, some outlook and future work have also been proposed.
Although in infancy, the demonstrated etch-then-regrow and the hydrogen plasma treatment methods have the potential to ultimately solve the challenges in GaN and benefit the development of the wide-ultra-wide bandgap industry, technology, and society.
ContributorsYang, Chen (Author) / Zhao, Yuji (Thesis advisor) / Goodnick, Stephen (Committee member) / Yu, Hongbin (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2021
Forward and Backward Machine Learning for Modeling Copper Diffusion in Cadmium Telluride Solar Cells
Description
To optimize solar cell performance, it is necessary to properly design the doping profile in the absorber layer of the solar cell. For CdTe solar cells, Cu is used for providing p-type doping. Hence, having an estimator that, given the diffusion parameter set (time and Temperature) and the doping concentration at the junction, gives the junction depth of the absorber layer, is essential in the design process of CdTe solar cells (and other cell technologies). In this work it is called a forward (direct) estimation process. The backward (inverse) problem then is the one in which, given the junction depth and the desired concentration of Cu doping at the CdTe/CdS heterointerface, the estimator gives the time and/or the Temperature needed to achieve the desired doping profiles. This is called a backward (inverse) estimation process. Such estimators, both forward and backward, do not exist in the literature for solar cell technology. To train the Machine Learning (ML) estimator, it is necessary to first generate a large set of data that are obtained by using the PVRD-FASP Solver, which has been validated via comparison with experimental values. Note that this big dataset needs to be generated only once. Next, one uses Machine Learning (ML), Deep Learning (DL) and Artificial Intelligence (AI) to extract the actual Cu doping profiles that result from the process of diffusion, annealing, and cool-down in the fabrication sequence of CdTe solar cells. Two deep learning neural network models are used: (1) Multilayer Perceptron Artificial Neural Network (MLPANN) model using a Keras Application Programmable Interface (API) with TensorFlow backend, and (2) Radial Basis Function Network (RBFN) model to predict the Cu doping profiles for different Temperatures and durations of the annealing process. Excellent agreement between the simulated results obtained with the PVRD-FASP Solver and the predicted values is obtained. It is important to mention here that it takes a significant amount of time to generate the Cu doping profiles given the initial conditions using the PVRD-FASP Solver, because solving the drift-diffusion-reaction model is mathematically a stiff problem and leads to numerical instabilities if the time steps are not small enough, which, in turn, affects the time needed for completion of one simulation run. The generation of the same with Machine Learning (ML) is almost instantaneous and can serve as an excellent simulation tool to guide future fabrication of optimal doping profiles in CdTe solar cells.
ContributorsSalman, Ghaith (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen M. (Thesis advisor) / Ringhofer, Christian (Committee member) / Banerjee, Ayan (Committee member) / Arizona State University (Publisher)
Created2021
Description
The advent of silicon, germanium, narrow-gap III-V materials, and later the wide bandgap (WBG) semiconductors, and their subsequent revolution and enrichment of daily life begs the question: what is the next generation of semiconductor electronics poised to look like? Ultrawide bandgap (UWBG) semiconductors are the class of semiconducting materials that possess an electronic bandgap (EG) greater than that of gallium nitride (GaN), which is 3.4 eV. They currently consist of beta-phase gallium oxide (β-Ga2O3 ; EG = 4.6–4.9 eV), diamond (EG = 5.5 eV), aluminum nitride (AlN; EG =6.2 eV), cubic boron nitride (BN; EG = 6.4 eV), and other materials hitherto undiscovered. Such a strong emphasis is placed on the semiconductor bandgap because so many relevant electronic performance properties scale positively with the bandgap. Where power electronics is concerned, the Baliga's Figure of Merit (BFOM) quantifies how much voltage a device can block in the off state and how high its conductivity is in the on state. The BFOM has a sixth-order dependence on the bandgap. The UWBG class of semiconductors also possess the potential for higher switching efficiencies and power densities and better suitability for deep-UV and RF optoelectronics. Many UWBG materials have very tight atomic lattices and high displacement energies, which makes them suitable for extreme applications such as radiation-harsh environments commonly found in military, industrial, and outer space applications. In addition, the UWBG materials also show promise for applications in quantum information sciences. For all the inherent promise and burgeoning research efforts, key breakthroughs in UWBG research have only occurred as recently as within the last two to three decades, making them extremely immature in comparison with the well-known WBG materials and others before them. In particular, AlN suffers from a lack of wide availability of low-cost, highquality substrates, a stark contrast to β-Ga2O3, which is now readily commercially available. In order to realize more efficient and varied devices on the relatively nascent UWBG materials platform, a deeper understanding of the various devices and physics is necessary. The following thesis focuses on the UWBG materials AlN and β-Ga2O3, overlooking radiation studies, a novel device heterojunction, and electronic defect study.
ContributorsMontes, Jossue (Author) / Zhao, Yuji (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Sanchez Esqueda, Ivan (Committee member) / Arizona State University (Publisher)
Created2021
Description
Improving solar cell efficiency is an enormously powerful driver of the cost reduction of solar power. While the silicon solar cell efficiency approaches theoretical limits, many thin-film solar cell technologies fall behind. In particular, cadmium telluride (CdTe) solar cells have only reached a maximum efficiency of 22.1%. One of the challenges associated with the development of CdTe solar cells is due its high electron affinity and the difficulty of achieving heavy p-type doping. This challenge results in the formation of a Schottky barrier at the hole contact, which reduces solar cell efficiency, primarily through the reduction of open circuit voltage (Voc) and fill factor (FF). The Schottky barrier makes the characterization of the actual solar cell p-n junction through current voltage (I-V), capacitance voltage (C-V), and thermal admittance spectroscopy (TAS) more difficult and not straightforward. However, interpreted through accurate physical models and under the correct experimental conditions, these techniques can then also be used to extract the impact of the contact on device performance, chiefly through analysis of the barrier height. Additionally, characterization of the open circuit voltage as a function of the illumination intensity (Suns-Voc) and the open circuit voltage as a function of temperature [Voc(T)] offer insight into the potential impact of the contact barrier. A comprehensive review of characterization of the barrier through the above techniques is given, primarily through a two-diode model. Further, a discussion of the utility of electrochemical capacitance-voltage (ECV) profiling to recover carrier concentrations in device regions otherwise difficult to access through traditional C-V measurements is provided along with modeling to support this conclusion. A discussion of and justification for the experimental extraction of barrier height from TAS measurements are also provided. Experimentally measured Voc(T), C-V, and Suns-Voc characteristics are presented and compared for a CdTe and a gallium arsenide (GaAs) solar cell. Experimental results indicate that the contact barriers and other possible non-idealities strongly affect the performance of the CdTe solar cell. Modeling results demonstrate the use of ECV to characterize solar cell absorbers can offer information unavailable via conventional C-V measurements.
ContributorsRosenblatt, Nathan (Author) / Zhang, Yong-Hang (Thesis advisor) / King, Richard R (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2021
Description
The research of alternative materials and new device architectures to exceed the limits of conventional silicon-based devices has been sparked by the persistent pursuit of semiconductor technology scaling. The development of tungsten diselenide (WSe2) and molybdenum disulfide (MoS2), well-known member of the transition metal dichalcogenide (TMD) family, has made great strides towards ultrascaled two-dimensional (2D) field-effect-transistors (FETs). The scaling issues facing silicon-based complementary metal-oxide-semiconductor (CMOS) technologies can be solved by 2D FETs, which show extraordinary potential.This dissertation provides a comprehensive experimental analysis relating to improvements in p-type metal-oxide-semiconductor (PMOS) FETs with few-layer WSe2 and high-κ metal gate (HKMG) stacks. Compared to this works improved methods, standard metallization (more damaging to underlying channel) results in significant Fermi-level pinning, although Schottky barrier heights remain small (< 100 meV) when using high work function metals. Temperature-dependent analysis reveals a dominant contribution to contact resistance from the damaged channel access region. Thus, through less damaging metallization methods combined with strongly scaled HKMG stacks significant improvements were achieved in contact resistance and PMOS FET overall performance. A clean contact/channel interface was achieved through high-vacuum evaporation and temperature-controlled stepped deposition. Theoretical analysis using a Landauer transport adapted to WSe2 Schottky barrier FETs (SB-FETs) elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance towards the ultimate CMOS scaling limit.
Next, this dissertation discusses how device electrical characteristics are affected by scaling of equivalent oxide thickness (EOT) and by adopting double-gate FET architectures, as well as how this might support CMOS scaling. An improved gate control over the channel is made possible by scaling EOT, improving on-off current ratios, carrier mobility, and subthreshold swing. This study also elucidates the impact of EOT scaling on FET gate hysteresis attributed to charge-trapping effects in high-κ-dielectrics prepared by atomic layer deposition (ALD). These developments in 2D FETs offer a compelling alternative to conventional silicon-based devices and a path for continued transistor scaling. This research contributes to ongoing efforts in 2D materials for future semiconductor technologies. Finally, this work introduces devices based on emerging Janus TMDs and bismuth oxyselenide (Bi2O2Se) layered semiconductors.
ContributorsPatoary, Md Naim Hossain (Author) / Sanchez Esqueda, Ivan (Thesis advisor) / Tongay, Sefaattin (Committee member) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2023
Description
In the last few decades, extensive research efforts have been focused on scaling down silicon-based complementary metal-oxide semiconductor (CMOS) technology to enable the continuation of Moore’s law. State-of-art CMOS includes fully depleted silicon-on-insulator (FDSOI) field-effect-transistors (FETs) with ultra-thin silicon channels (6 nm), as well as other three-dimensional (3D) device architectures like Fin-FETs, nanosheet FETs, etc. Significant research efforts have characterized these technologies towards various applications, and at different conditions including a wide range of temperatures from room temperature (300 K) down to cryogenic temperatures. Theoretical efforts have studied ultrascaled devices using Landauer theory to further understand their transport properties and predict their performance in the quasi-ballistic regime.Further scaling of CMOS devices requires the introduction of new semiconducting channel materials, as now established by the research community. Here, two-dimensional (2D) semiconductors have emerged as a promising candidate to replace silicon for next-generation ultrascaled CMOS devices. These emerging 2D semiconductors also have applications beyond CMOS, for example in novel memory, neuromorphic, and spintronic devices. Graphene is a promising candidate for spintronic devices due to its outstanding spin transport properties as evidenced by numerous studies in non-local lateral spin valve (LSV) geometries. The essential components of graphene-based LSV, such as graphene FETs, metal-graphene contacts, and tunneling barriers, were individually investigated as part of this doctoral dissertation.
In this work, several contributions were made to these CMOS and beyond CMOS technologies. This includes comprehensive characterization and modeling of FDSOI nanoscale FETs from room temperature down to cryogenic temperatures. Using Landauer theory for nanoscale transistors, FDSOI devices were analyzed and modeled under quasi-ballistic operation. This was extended towards a virtual-source modeling approach that accounts for temperature-dependent quasi-ballistic transport and back-gate biasing effects. Additionally, graphene devices with ultrathin high-k gate dielectrics were investigated towards FETs, non-volatile memory, and spintronic devices. New contributions were made relating to charge trapping effects and their impact on graphene device electrostatics (Dirac voltage shifts) and transport properties (impact on mobility and conductivity). This work also studied contact resistance and tunneling effects using transfer length method (TLM) graphene FET structures and magnetic tunneling junction (MTJ) towards graphene-based LSV.
ContributorsZhou, Guantong (Author) / Sanchez Esqueda, Ivan (Thesis advisor) / Vasileska, Dragica (Committee member) / Tongay, Sefaattin (Committee member) / Thornton, Trevor (Committee member) / Arizona State University (Publisher)
Created2023
Description
In this dissertation, I investigate the electronic properties of two important silicon(Si)-based heterojunctions 1) hydrogenated amorphous silicon/crystalline silicon (a-Si:H/c-Si) which has already been commercialized in Heterojunction with Intrinsic Thin-layer (HIT) cells and 2) gallium phosphide/silicon (GaP/Si) which has been suggested to be a good candidate for replacing a-Si:H/c-Si in HIT cells in order to boost the HIT cell’s efficiency.
In the first part, the defect states of amorphous silicon (a-Si) and a-Si:H material are studied using density functional theory (DFT). I first employ simulated annealing using molecular dynamics (MD) to create stable configurations of a-Si:H, and then analyze the atomic and electronic structure to investigate which structural defects interact with H, and how the electronic structure changes with H addition. I find that H atoms decrease the density of mid-gap states and increase the band gap of a-Si by binding to Si atoms with strained bonds. My results also indicate that Si atoms with strained bonds creates high-localized orbitals in the mobility gap of a-Si, and the binding of H atoms to them can dramatically decrease their degree of localization.
In the second part, I explore the effect of the H binding configuration on the electronic properties of a-Si:H/c-Si heterostructure using density functional theory studies of models of the interface between a-Si:H and c-Si. The electronic properties from DFT show that depending on the energy difference between configurations, the electronic properties are sensitive to the H binding configurations.
In the last part, I examine the electronic structure of GaP/Si(001) heterojunctions and the effect of hydrogen H passivation at the interface in comparison to interface mixing, through DFT calculations. My calculations show that due to the heterovalent mismatch nature of the GaP/Si interface, there is a high density of localized states at the abrupt GaP/Si interface due to the excess charge associated with heterovalent bonding, as reported elsewhere. I find that the addition of H leads to additional bonding at the interface which mitigates the charge imbalance, and greatly reduces the density of localized states, leading to a nearly ideal heterojunction.
In the first part, the defect states of amorphous silicon (a-Si) and a-Si:H material are studied using density functional theory (DFT). I first employ simulated annealing using molecular dynamics (MD) to create stable configurations of a-Si:H, and then analyze the atomic and electronic structure to investigate which structural defects interact with H, and how the electronic structure changes with H addition. I find that H atoms decrease the density of mid-gap states and increase the band gap of a-Si by binding to Si atoms with strained bonds. My results also indicate that Si atoms with strained bonds creates high-localized orbitals in the mobility gap of a-Si, and the binding of H atoms to them can dramatically decrease their degree of localization.
In the second part, I explore the effect of the H binding configuration on the electronic properties of a-Si:H/c-Si heterostructure using density functional theory studies of models of the interface between a-Si:H and c-Si. The electronic properties from DFT show that depending on the energy difference between configurations, the electronic properties are sensitive to the H binding configurations.
In the last part, I examine the electronic structure of GaP/Si(001) heterojunctions and the effect of hydrogen H passivation at the interface in comparison to interface mixing, through DFT calculations. My calculations show that due to the heterovalent mismatch nature of the GaP/Si interface, there is a high density of localized states at the abrupt GaP/Si interface due to the excess charge associated with heterovalent bonding, as reported elsewhere. I find that the addition of H leads to additional bonding at the interface which mitigates the charge imbalance, and greatly reduces the density of localized states, leading to a nearly ideal heterojunction.
ContributorsVatan Meidanshahi, Reza (Author) / Goodnick, Stephen Marshall (Thesis advisor) / Vasileska, Dragica (Committee member) / Bowden, Stuart (Committee member) / Honsberg, Christiana (Committee member) / Arizona State University (Publisher)
Created2019
Description
Scaling of the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) towards shorter channel lengths, has lead to an increasing importance of quantum effects on the device performance. Until now, a semi-classical model based on Monte Carlo method for instance, has been sufficient to address these issues in silicon, and arrive at a reasonably good fit to experimental mobility data. But as the semiconductor world moves towards 10nm technology, many of the basic assumptions in this method, namely the very fundamental Fermi’s golden rule come into question. The derivation of the Fermi’s golden rule assumes that the scattering is infrequent (therefore the long time limit) and the collision duration time is zero. This thesis overcomes some of the limitations of the above approach by successfully developing a quantum mechanical simulator that can model the low-field inversion layer mobility in silicon MOS capacitors and other inversion layers as well. It solves for the scattering induced collisional broadening of the states by accounting for the various scattering mechanisms present in silicon through the non-equilibrium based near-equilibrium Green’s Functions approach, which shall be referred to as near-equilibrium Green’s Function (nEGF) in this work. It adopts a two-loop approach, where the outer loop solves for the self-consistency between the potential and the subband sheet charge density by solving the Poisson and the Schrödinger equations self-consistently. The inner loop solves for the nEGF (renormalization of the spectrum and the broadening of the states), self-consistently using the self-consistent Born approximation, which is then used to compute the mobility using the Green-Kubo Formalism.
ContributorsJayaram Thulasingam, Gokula Kannan (Author) / Vasileska, Dragica (Thesis advisor) / Ferry, David (Committee member) / Goodnick, Stephen (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2017