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Description
Hydrogen sulfide (H2S) has been identified as a potential ingredient for grain boundary passivation of multicrystalline silicon. Sulfur is already established as a good surface passivation material for crystalline silicon (c-Si). Sulfur can be used both from solution and hydrogen sulfide gas. For multicrystalline silicon (mc-Si) solar cells, increasing efficiency is a major challenge because passivation of mc-Si wafers is more difficult due to its randomly orientated crystal grains and the principal source of recombination is contributed by the defects in the bulk of the wafer and surface.
In this work, a new technique for grain boundary passivation for multicrystalline silicon using hydrogen sulfide has been developed which is accompanied by a compatible Aluminum oxide (Al2O3) surface passivation. Minority carrier lifetime measurement of the passivated samples has been performed and the analysis shows that success has been achieved in terms of passivation and compared to already existing hydrogen passivation, hydrogen sulfide passivation is actually better. Also the surface passivation by Al2O3 helps to increase the lifetime even more after post-annealing and this helps to attain stability for the bulk passivated samples. Minority carrier lifetime is directly related to the internal quantum efficiency of solar cells. Incorporation of this technique in making mc-Si solar cells is supposed to result in higher efficiency cells. Additional research is required in this field for the use of this technique in commercial solar cells.
In this work, a new technique for grain boundary passivation for multicrystalline silicon using hydrogen sulfide has been developed which is accompanied by a compatible Aluminum oxide (Al2O3) surface passivation. Minority carrier lifetime measurement of the passivated samples has been performed and the analysis shows that success has been achieved in terms of passivation and compared to already existing hydrogen passivation, hydrogen sulfide passivation is actually better. Also the surface passivation by Al2O3 helps to increase the lifetime even more after post-annealing and this helps to attain stability for the bulk passivated samples. Minority carrier lifetime is directly related to the internal quantum efficiency of solar cells. Incorporation of this technique in making mc-Si solar cells is supposed to result in higher efficiency cells. Additional research is required in this field for the use of this technique in commercial solar cells.
ContributorsSaha, Arunodoy, Ph.D (Author) / Tao, Meng (Thesis advisor) / Vasileska, Dragica (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2014
Description
A primary motivation of research in photovoltaic technology is to obtain higher efficiency photovoltaic devices at reduced cost of production so that solar electricity can be cost competitive. The majority of photovoltaic technologies are based on p-n junction, with efficiency potential being much lower than the thermodynamic limits of individual technologies and thereby providing substantial scope for further improvements in efficiency. The thesis explores photovoltaic devices using new physical processes that rely on thin layers and are capable of attaining the thermodynamic limit of photovoltaic technology. Silicon heterostructure is one of the candidate technologies in which thin films induce a minority carrier collecting junction in silicon and the devices can achieve efficiency close to the thermodynamic limits of silicon technology. The thesis proposes and experimentally establishes a new theory explaining the operation of silicon heterostructure solar cells. The theory will assist in identifying the optimum properties of thin film materials for silicon heterostructure and help in design and characterization of the devices, along with aiding in developing new devices based on this technology. The efficiency potential of silicon heterostructure is constrained by the thermodynamic limit (31%) of single junction solar cell and is considerably lower than the limit of photovoltaic conversion (~ 80 %). A further improvement in photovoltaic conversion efficiency is possible by implementing a multiple quasi-fermi level system (MQFL). A MQFL allows the absorption of sub band gap photons with current being extracted at a higher band-gap, thereby allowing to overcome the efficiency limit of single junction devices. A MQFL can be realized either by thin epitaxial layers of alternating higher and lower band gap material with nearly lattice matched (quantum well) or highly lattice mismatched (quantum dot) structure. The thesis identifies the material combination for quantum well structure and calculates the absorption coefficient of a MQFl based on quantum well. GaAsSb (barrier)/InAs(dot) was identified as a candidate material for MQFL using quantum dot. The thesis explains the growth mechanism of GaAsSb and the optimization of GaAsSb and GaAs heterointerface.
ContributorsGhosha, Kuṇāla (Author) / Bowden, Stuart (Thesis advisor) / Honsberg, Christiana (Thesis advisor) / Vasileska, Dragica (Committee member) / Goodnick, Stephen (Committee member) / Arizona State University (Publisher)
Created2011
Description
This dissertation addresses challenges pertaining to multi-junction (MJ) solar cells from material development to device design and characterization. Firstly, among the various methods to improve the energy conversion efficiency of MJ solar cells using, a novel approach proposed recently is to use II-VI (MgZnCd)(SeTe) and III-V (AlGaIn)(AsSb) semiconductors lattice-matched on GaSb or InAs substrates for current-matched subcells with minimal defect densities. CdSe/CdTe superlattices are proposed as a potential candidate for a subcell in the MJ solar cell designs using this material system, and therefore the material properties of the superlattices are studied. The high structural qualities of the superlattices are obtained from high resolution X-ray diffraction measurements and cross-sectional transmission electron microscopy images. The effective bandgap energies of the superlattices obtained from the photoluminescence (PL) measurements vary with the layer thicknesses, and are smaller than the bandgap energies of either the constituent material. Furthermore, The PL peak position measured at the steady state exhibits a blue shift that increases with the excess carrier concentration. These results confirm a strong type-II band edge alignment between CdSe and CdTe. The valence band offset between unstrained CdSe and CdTe is determined as 0.63 eV±0.06 eV by fitting the measured PL peak positions using the Kronig-Penney model. The blue shift in PL peak position is found to be primarily caused by the band bending effect based on self-consistent solutions of the Schrödinger and Poisson equations. Secondly, the design of the contact grid layout is studied to maximize the power output and energy conversion efficiency for concentrator solar cells. Because the conventional minimum power loss method used for the contact design is not accurate in determining the series resistance loss, a method of using a distributed series resistance model to maximize the power output is proposed for the contact design. It is found that the junction recombination loss in addition to the series resistance loss and shadowing loss can significantly affect the contact layout. The optimal finger spacing and maximum efficiency calculated by the two methods are close, and the differences are dependent on the series resistance and saturation currents of solar cells. Lastly, the accurate measurements of external quantum efficiency (EQE) are important for the design and development of MJ solar cells. However, the electrical and optical couplings between the subcells have caused EQE measurement artifacts. In order to interpret the measurement artifacts, DC and small signal models are built for the bias condition and the scan of chopped monochromatic light in the EQE measurements. Characterization methods are developed for the device parameters used in the models. The EQE measurement artifacts are found to be caused by the shunt and luminescence coupling effects, and can be minimized using proper voltage and light biases. Novel measurement methods using a pulse voltage bias or a pulse light bias are invented to eliminate the EQE measurement artifacts. These measurement methods are nondestructive and easy to implement. The pulse voltage bias or pulse light bias is superimposed on the conventional DC voltage and light biases, in order to control the operating points of the subcells and counterbalance the effects of shunt and luminescence coupling. The methods are demonstrated for the first time to effectively eliminate the measurement artifacts.
ContributorsLi, Jingjing (Author) / Zhang, Yong-Hang (Thesis advisor) / Tao, Meng (Committee member) / Schroder, Dieter (Committee member) / Vasileska, Dragica (Committee member) / Arizona State University (Publisher)
Created2012
Description
To date, the most popular and dominant material for commercial solar cells is
crystalline silicon (or wafer-Si). It has the highest cell efficiency and cell lifetime out
of all commercial solar cells. Although the potential of crystalline-Si solar cells in
supplying energy demands is enormous, their future growth will likely be constrained
by two major bottlenecks. The first is the high electricity input to produce
crystalline-Si solar cells and modules, and the second is the limited supply of silver
(Ag) reserves. These bottlenecks prevent crystalline-Si solar cells from reaching
terawatt-scale deployment, which means the electricity produced by crystalline-Si
solar cells would never fulfill a noticeable portion of our energy demands in the future.
In order to solve the issue of Ag limitation for the front metal grid, aluminum (Al)
electroplating has been developed as an alternative metallization technique in the
fabrication of crystalline-Si solar cells. The plating is carried out in a
near-room-temperature ionic liquid by means of galvanostatic electrolysis. It has been
found that dense, adherent Al deposits with resistivity in the high 10^–6 ohm-cm range
can be reproducibly obtained directly on Si substrates and nickel seed layers. An
all-Al Si solar cell, with an electroplated Al front electrode and a screen-printed Al
back electrode, has been successfully demonstrated based on commercial p-type
monocrystalline-Si solar cells, and its efficiency is approaching 15%. Further
optimization of the cell fabrication process, in particular a suitable patterning
technique for the front silicon nitride layer, is expected to increase the efficiency of
the cell to ~18%. This shows the potential of Al electroplating in cell metallization is
promising and replacing Ag with Al as the front finger electrode is feasible.
crystalline silicon (or wafer-Si). It has the highest cell efficiency and cell lifetime out
of all commercial solar cells. Although the potential of crystalline-Si solar cells in
supplying energy demands is enormous, their future growth will likely be constrained
by two major bottlenecks. The first is the high electricity input to produce
crystalline-Si solar cells and modules, and the second is the limited supply of silver
(Ag) reserves. These bottlenecks prevent crystalline-Si solar cells from reaching
terawatt-scale deployment, which means the electricity produced by crystalline-Si
solar cells would never fulfill a noticeable portion of our energy demands in the future.
In order to solve the issue of Ag limitation for the front metal grid, aluminum (Al)
electroplating has been developed as an alternative metallization technique in the
fabrication of crystalline-Si solar cells. The plating is carried out in a
near-room-temperature ionic liquid by means of galvanostatic electrolysis. It has been
found that dense, adherent Al deposits with resistivity in the high 10^–6 ohm-cm range
can be reproducibly obtained directly on Si substrates and nickel seed layers. An
all-Al Si solar cell, with an electroplated Al front electrode and a screen-printed Al
back electrode, has been successfully demonstrated based on commercial p-type
monocrystalline-Si solar cells, and its efficiency is approaching 15%. Further
optimization of the cell fabrication process, in particular a suitable patterning
technique for the front silicon nitride layer, is expected to increase the efficiency of
the cell to ~18%. This shows the potential of Al electroplating in cell metallization is
promising and replacing Ag with Al as the front finger electrode is feasible.
ContributorsSun, Wen-Cheng (Author) / Tao, Meng (Thesis advisor) / Vasileska, Dragica (Committee member) / Yu, Hongbin (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2016
Description
Sb-based type-II superlattices (T2SLs) are potential alternative to HgCdTe for infrared detection due to their low manufacturing cost, good uniformity, high structural stability, and suppressed Auger recombination. The emerging InAs/InAsSb T2SLs have minority carrier lifetimes 1-2 orders of magnitude longer than those of the well-studied InAs/InGaSb T2SLs, and therefore have the potential to achieve photodetectors with higher performance. This work develops a novel method to measure the minority carrier lifetimes in infrared materials, and reports a comprehensive characterization of minority carrier lifetime and transport in InAs/InAsSb T2SLs at temperatures below 77 K.
A real-time baseline correction (RBC) method for minority carrier lifetime measurement is developed by upgrading a conventional boxcar-based time-resolved photoluminescence (TRPL) experimental system that suffers from low signal-to-noise ratio due to strong low frequency noise. The key is to modify the impulse response of the conventional TRPL system, and therefore the system becomes less sensitive to the dominant noise. Using this RBC method, the signal-to-noise ratio is improved by 2 orders of magnitude.
A record long minority carrier lifetime of 12.8 μs is observed in a high-quality mid-wavelength infrared InAs/InAsSb T2SLs at 15 K. It is further discovered that this long lifetime is partially due to strong carrier localization, which is revealed by temperature-dependent photoluminescence (PL) and TRPL measurements for InAs/InAsSb T2SLs with different period thicknesses. Moreover, the PL and TRPL results suggest that the atomic layer thickness variation is the main origin of carrier localization, which is further confirmed by a calculation using transfer matrix method.
To study the impact of the carrier localization on the device performance of InAs/InAsSb photodetectors, minority hole diffusion lengths are determined by the simulation of external quantum efficiency (EQE). A comparative study shows that carrier localization has negligible effect on the minority hole diffusion length in InAs/InAsSb T2SLs, and the long minority carrier lifetimes enhanced by carrier localization is not beneficial for photodetector operation.
A real-time baseline correction (RBC) method for minority carrier lifetime measurement is developed by upgrading a conventional boxcar-based time-resolved photoluminescence (TRPL) experimental system that suffers from low signal-to-noise ratio due to strong low frequency noise. The key is to modify the impulse response of the conventional TRPL system, and therefore the system becomes less sensitive to the dominant noise. Using this RBC method, the signal-to-noise ratio is improved by 2 orders of magnitude.
A record long minority carrier lifetime of 12.8 μs is observed in a high-quality mid-wavelength infrared InAs/InAsSb T2SLs at 15 K. It is further discovered that this long lifetime is partially due to strong carrier localization, which is revealed by temperature-dependent photoluminescence (PL) and TRPL measurements for InAs/InAsSb T2SLs with different period thicknesses. Moreover, the PL and TRPL results suggest that the atomic layer thickness variation is the main origin of carrier localization, which is further confirmed by a calculation using transfer matrix method.
To study the impact of the carrier localization on the device performance of InAs/InAsSb photodetectors, minority hole diffusion lengths are determined by the simulation of external quantum efficiency (EQE). A comparative study shows that carrier localization has negligible effect on the minority hole diffusion length in InAs/InAsSb T2SLs, and the long minority carrier lifetimes enhanced by carrier localization is not beneficial for photodetector operation.
ContributorsLin, Zhiyuan (Author) / Zhang, Yong-Hang (Thesis advisor) / Vasileska, Dragica (Committee member) / Johnson, Shane (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2016
Description
Polycrystalline CdS/CdTe solar cells continue to dominate the thin-film photovoltaics industry with an achieved record efficiency of over 22% demonstrated by First Solar, yet monocrystalline CdTe devices have received considerably less attention over the years. Monocrystalline CdTe double-heterostructure solar cells show great promise with respect to addressing the problem of low Voc with the passing of the 1 V benchmark. Rapid progress has been made in driving the efficiency in these devices ever closer to the record presently held by polycrystalline thin-films. This achievement is primarily due to the utilization of a remote p-n heterojunction in which the heavily doped contact materials, which are so problematic in terms of increasing non-radiative recombination inside the absorber, are moved outside of the CdTe double heterostructure with two MgyCd1-yTe barrier layers to provide confinement and passivation at the CdTe surfaces. Using this design, the pursuit and demonstration of efficiencies beyond 20% in CdTe solar cells is reported through the study and optimization of the structure barriers, contacts layers, and optical design. Further development of a wider bandgap MgxCd1-xTe solar cell based on the same design is included with the intention of applying this knowledge to the development of a tandem solar cell constructed on a silicon subcell. The exploration of different hole-contact materials—ZnTe, CuZnS, and a-Si:H—and their optimization is presented throughout the work. Devices utilizing a-Si:H hole contacts exhibit open-circuit voltages of up to 1.11 V, a maximum total-area efficiency of 18.5% measured under AM1.5G, and an active-area efficiency of 20.3% for CdTe absorber based devices. The achievement of voltages beyond 1.1V while still maintaining relatively high fill factors with no rollover, either before or after open-circuit, is a promising indicator that this approach can result in devices surpassing the 22% record set by polycrystalline designs. MgxCd1-xTe absorber based devices have been demonstrated with open-circuit voltages of up to 1.176 V and a maximum active-area efficiency of 11.2%. A discussion of the various loss mechanisms present within these devices, both optical and electrical, concludes with the presentation of a series of potential design changes meant to address these issues.
ContributorsBecker, Jacob J (Author) / Zhang, Yong-Hang (Thesis advisor) / Bertoni, Mariana (Committee member) / Vasileska, Dragica (Committee member) / Johnson, Shane (Committee member) / Arizona State University (Publisher)
Created2017
Description
The goal of this research work is to develop an understanding as well as modelling thermal effects in Si based nano-scale devices using a multiscale simulator tool. This tool has been developed within the research group at Arizona State University led by Professor Dr. Dragica Vasileska. Another research group, headed by Professor Dr. Thornton, also at Arizona State University, provided support with software tools, by not only laying out the physical experimental device, but also provided experimental data to verify the correctness and accuracy of the developed simulation tool. The tool consists of three separate but conjoined modules at different scales of representation. 1) A particle based, ensemble Monte Carlo (MC) simulation tool, which, in the long-time (electronic motion) limit, solves the Boltzmann transport equation (BTE) for electrons, coupled with an iterative solution to a two-dimensional (2D) Poisson’s equation, at the base device level. 2) Another device level thermal modeling tool which solves the energy balance equations accounting for carrier-phonon and phonon-phonon interactions and is integrated with the MC tool. 3) Lastly, a commercial technology computer aided design (TCAD) software, Silvaco is employed to incorporate the results from the above two tools to a circuit level, common-source dual-transistor circuit, where one of the devices acts a heater and the other as a sensor, to study the impacts of thermal heating. The results from this tool are fed back to the previous device level tools to iterate on, until a stable, unified electro-thermal equilibrium/result is obtained. This coupled electro-thermal approach was originally developed for an individual n-channel MOSFET (NMOS) device by Prof. Katerina Raleva and was extended to allow for multiple devices in tandem, thereby providing a platform for better and more accurate modeling of device behavior, analyzing circuit performance, and understanding thermal effects. Simulating this dual device circuit and analyzing the extracted voltage transfer and output characteristics verifies the efficacy of this methodology as the results obtained from this multi-scale, electro-thermal simulator tool, are found to be in good general agreement with the experimental data.
ContributorsQazi, Suleman Sami (Author) / Vasileska, Dragica (Thesis advisor) / Goodnick, Stephen M (Committee member) / Thornton, Trevor J (Committee member) / Ferry, David K (Committee member) / Arizona State University (Publisher)
Created2021