Matching Items (23)
Filtering by

Clear all filters

152178-Thumbnail Image.png
Description
The construction industry in India suffers from major time and cost overruns. Data from government and industry reports suggest that projects suffer from 20 to 25 percent time and cost overruns. Waste of resources has been identified as a major source of inefficiency. Despite a substantial increase in the past

The construction industry in India suffers from major time and cost overruns. Data from government and industry reports suggest that projects suffer from 20 to 25 percent time and cost overruns. Waste of resources has been identified as a major source of inefficiency. Despite a substantial increase in the past few years, demand for professionals and contractors still exceeds supply by a large margin. The traditional methods adopted in the Indian construction industry may not suffice the needs of this dynamic environment, as they have produced large inefficiencies. Innovative ways of procurement and project management can satisfy the needs aspired to as well as bring added value. The problems faced by the Indian construction industry are very similar to those faced by other developing countries. The objective of this paper is to discuss and analyze the economic concerns, inefficiencies and investigate a model that both explains the Indian construction industry structure and provides a framework to improve efficiencies. The Best Value (BV) model is examined as an approach to be adopted in lieu of the traditional approach. This could result in efficient construction projects by minimizing cost overruns and delays, which until now have been a rarity.
ContributorsNihas, Syed (Author) / Kashiwagi, Dean (Thesis advisor) / Sullivan, Kenneth (Committee member) / Kashiwagi, Jacob (Committee member) / Arizona State University (Publisher)
Created2013
150208-Thumbnail Image.png
Description
Pulse Density Modulation- (PDM-) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in Pulse Width Modulation - (PWM-) based amplifiers. However, their low-voltage analog implementations also require a linear- loop filter and a quantizer. A PDM-based class-D audio amplifier using a frequency-domain quantization is presented

Pulse Density Modulation- (PDM-) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in Pulse Width Modulation - (PWM-) based amplifiers. However, their low-voltage analog implementations also require a linear- loop filter and a quantizer. A PDM-based class-D audio amplifier using a frequency-domain quantization is presented in this paper. The digital-intensive frequency domain approach achieves high linearity under low-supply regimes. An analog comparator and a single-bit quantizer are replaced with a Current-Controlled Oscillator- (ICO-) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, singlebit class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18 um CMOS process, with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-ohms loudspeaker load. The amplifier can deliver the output power of 280 mW.
ContributorsLee, Junghan (Author) / Bakkaloglu, Bertan (Thesis advisor) / Kiaei, Sayfe (Committee member) / Ozev, Sule (Committee member) / Song, Hongjiang (Committee member) / Arizona State University (Publisher)
Created2011
150241-Thumbnail Image.png
Description
ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices

ABSTRACT To meet stringent market demands, manufacturers must produce Radio Frequency (RF) transceivers that provide wireless communication between electronic components used in consumer products at extremely low cost. Semiconductor manufacturers are in a steady race to increase integration levels through advanced system-on-chip (SoC) technology. The testing costs of these devices tend to increase with higher integration levels. As the integration levels increase and the devices get faster, the need for high-calibre low cost test equipment become highly dominant. However testing the overall system becomes harder and more expensive. Traditionally, the transceiver system is tested in two steps utilizing high-calibre RF instrumentation and mixed-signal testers, with separate measurement setups for transmitter and receiver paths. Impairments in the RF front-end, such as the I/Q gain and phase imbalance and nonlinearity, severely affect the performance of the device. The transceiver needs to be characterized in terms of these impairments in order to guarantee good performance and specification requirements. The motivation factor for this thesis is to come up with a low cost and computationally simple extraction technique of these impairments. In the proposed extraction technique, the mapping between transmitter input signals and receiver output signals are used to extract the impairment and nonlinearity parameters. This is done with the help of detailed mathematical modeling of the transceiver. While the overall behavior is nonlinear, both linear and nonlinear models to be used under different test setups are developed. A two step extraction technique has been proposed in this work. The extraction of system parameters is performed by using the mathematical model developed along with a genetic algorithm implemented in MATLAB. The technique yields good extraction results with reasonable error. It uses simple mathematical operation which makes the extraction fast and computationally simple when compared to other existing techniques such as traditional two step dedicated approach, Nonlinear Solver (NLS) approach, etc. It employs frequency domain analysis of low frequency input and output signals, over cumbersome time domain computations. Thus a test method, including detailed behavioral modeling of the transceiver, appropriate test signal design along with a simple algorithm for extraction is presented.
ContributorsSreenivassan, Aiswariya (Author) / Ozev, Sule (Thesis advisor) / Kiaei, Sayfe (Committee member) / Bakkaloglu, Bertan (Committee member) / Arizona State University (Publisher)
Created2011
154014-Thumbnail Image.png
Description
Biosensors aiming at detection of target analytes, such as proteins, microbes, virus, and toxins, are widely needed for various applications including detection of chemical and biological warfare (CBW) agents, biomedicine, environmental monitoring, and drug screening. Surface Plasmon Resonance (SPR), as a surface-sensitive analytical tool, can very sensitively respond to minute

Biosensors aiming at detection of target analytes, such as proteins, microbes, virus, and toxins, are widely needed for various applications including detection of chemical and biological warfare (CBW) agents, biomedicine, environmental monitoring, and drug screening. Surface Plasmon Resonance (SPR), as a surface-sensitive analytical tool, can very sensitively respond to minute changes of refractive index occurring adjacent to a metal film, offering detection limits up to a few ppt (pg/mL). Through SPR, the process of protein adsorption may be monitored in real-time, and transduced into an SPR angle shift. This unique technique bypasses the time-consuming, labor-intensive labeling processes, such as radioisotope and fluorescence labeling. More importantly, the method avoids the modification of the biomarker’s characteristics and behaviors by labeling that often occurs in traditional biosensors. While many transducers, including SPR, offer high sensitivity, selectivity is determined by the bio-receptors. In traditional biosensors, the selectivity is provided by bio-receptors possessing highly specific binding affinity to capture target analytes, yet their use in biosensors are often limited by their relatively-weak binding affinity with analyte, non-specific adsorption, need for optimization conditions, low reproducibility, and difficulties integrating onto the surface of transducers. In order to circumvent the use of bio-receptors, the competitive adsorption of proteins, termed the Vroman effect, is utilized in this work. The Vroman effect was first reported by Vroman and Adams in 1969. The competitive adsorption targeted here occurs among different proteins competing to adsorb to a surface, when more than one type of protein is present. When lower-affinity proteins are adsorbed on the surface first, they can be displaced by higher-affinity proteins arriving at the surface at a later point in time. Moreover, only low-affinity proteins can be displaced by high-affinity proteins, typically possessing higher molecular weight, yet the reverse sequence does not occur. The SPR biosensor based on competitive adsorption is successfully demonstrated to detect fibrinogen and thyroglobulin (Tg) in undiluted human serum and copper ions in drinking water through the denatured albumin.
ContributorsWang, Ran (Author) / Chae, Junseok (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Tsow, Tsing (Committee member) / Goryll, Michael (Committee member) / Arizona State University (Publisher)
Created2015
156222-Thumbnail Image.png
Description
The increase in computing power has simultaneously increased the demand for input/output (I/O) bandwidth. Unfortunately, the speed of I/O and memory interconnects have not kept pace. Thus, processor-based systems are I/O and interconnect limited. The memory aggregated bandwidth is not scaling fast enough to keep up with increasing bandwidth demands.

The increase in computing power has simultaneously increased the demand for input/output (I/O) bandwidth. Unfortunately, the speed of I/O and memory interconnects have not kept pace. Thus, processor-based systems are I/O and interconnect limited. The memory aggregated bandwidth is not scaling fast enough to keep up with increasing bandwidth demands. The term "memory wall" has been coined to describe this phenomenon.

A new memory bus concept that has the potential to push double data rate (DDR) memory speed to 30 Gbit/s is presented. We propose to map the conventional DDR bus to a microwave link using a multicarrier frequency division multiplexing scheme. The memory bus is formed using a microwave signal carried within a waveguide. We call this approach multicarrier memory channel architecture (MCMCA). In MCMCA, each memory signal is modulated onto an RF carrier using 64-QAM format or higher. The carriers are then routed using substrate integrated waveguide (SIW) interconnects. At the receiver, the memory signals are demodulated and then delivered to SDRAM devices. We pioneered the usage of SIW as memory channel interconnects and demonstrated that it alleviates the memory bandwidth bottleneck. We demonstrated SIW performance superiority over conventional transmission line in immunity to cross-talk and electromagnetic interference. We developed a methodology based on design of experiment (DOE) and response surface method techniques that optimizes the design of SIW interconnects and minimizes its performance fluctuations under material and manufacturing variations. Along with using SIW, we implemented a multicarrier architecture which enabled the aggregated DDR bandwidth to reach 30 Gbit/s. We developed an end-to-end system model in Simulink and demonstrated the MCMCA performance for ultra-high throughput memory channel.

Experimental characterization of the new channel shows that by using judicious frequency division multiplexing, as few as one SIW interconnect is sufficient to transmit the 64 DDR bits. Overall aggregated bus data rate achieves 240 GBytes/s data transfer with EVM not exceeding 2.26% and phase error of 1.07 degree or less.
ContributorsBensalem, Brahim (Author) / Aberle, James T. (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Tirkas, Panayiotis A. (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2018
157182-Thumbnail Image.png
Description
There is an ever-increasing demand for higher bandwidth and data rate ensuing from exploding number of radio frequency integrated systems and devices. As stated in the Shannon-Hartley theorem, the maximum achievable data rate of a communication channel is linearly proportional to the system bandwidth. This is the main driving force

There is an ever-increasing demand for higher bandwidth and data rate ensuing from exploding number of radio frequency integrated systems and devices. As stated in the Shannon-Hartley theorem, the maximum achievable data rate of a communication channel is linearly proportional to the system bandwidth. This is the main driving force behind pushing wireless systems towards millimeter-wave frequency range, where larger bandwidth is available at a higher carrier frequency. Observing the Moor’s law, highly scaled complementary metal–oxide–semiconductor (CMOS) technologies provide fast transistors with a high unity power gain frequency which enables operating at millimeter-wave frequency range. CMOS is the compelling choice for digital and signal processing modules which concurrently offers high computation speed, low power consumption, and mass integration at a high manufacturing yield. One of the main shortcomings of the sub-micron CMOS technologies is the low breakdown voltage of the transistors that limits the dynamic range of the radio frequency (RF) power blocks, especially with the power amplifiers. Low voltage swing restricts the achievable output power which translates into low signal to noise ratio and degraded linearity. Extensive research has been done on proposing new design and IC fabrication techniques with the goal of generating higher output power in CMOS technology. The prominent drawbacks of these solutions are an increased die area, higher cost per design, and lower overall efficiency due to lossy passive components. In this dissertation, CMOS compatible metal–semiconductor field-effect transistor (MESFETs) are utilized to put forward a new solution to enhance the power amplifier’s breakdown voltage, gain and maximum output power. Requiring no change to the conventional CMOS process flow, this low cost approach allows direct incorporation of high voltage power MESFETs into silicon. High voltage MESFETs were employed in a cascode structure to push the amplifier’s cutoff frequency and unity power gain frequency to the 5G and K-band frequency range. This dissertation begins with CMOS compatible MESFET modeling and fabrication steps, and culminates in the discussion of amplifier design and optimization methodology, parasitic de-embedding steps, simulation and measurement results, and high resistivity RF substrate characterization.
ContributorsHabibiMehr, Payam (Author) / Thornton, Trevor John (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Formicone, Gabriele (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2019
137112-Thumbnail Image.png
Description
Abstract The purpose of this project is to utilize the models and concepts from Information Measurement Theory (IMT) to help minimize future decision making with respect to my career path. When I began this project, my future was clouded, my initial conditions were unknown, my stress over future career-path decisions

Abstract The purpose of this project is to utilize the models and concepts from Information Measurement Theory (IMT) to help minimize future decision making with respect to my career path. When I began this project, my future was clouded, my initial conditions were unknown, my stress over future career-path decisions was high, and I had eight possible career paths in mind. I have narrowed my career-path options from eight to four. In addition, I have determined a one-year plan that enables me to be prepared to pursue any of the four career paths that I have found align with me. In this project, I explored my dominant initial conditions with respect to my career path. I tracked the job history of my grandparents and parents. These efforts allowed me to identify the strengths and weaknesses that I was exhibiting by the age of three. Natural law dictates that the strengths and weaknesses of my younger self will be the same strengths and weakness that I excel at and struggle with today. I then used my understanding of natural law and the event model process to map the strengths and weaknesses of my parents and grandparents and to compare and contrast these to my strengths and weaknesses, including those that were apparent by the time that I was three years old. Focusing in on what I really want from a job, four main goals were established to grade the various future career-path options. Finally, I documented my transition from uncertainty to clarity. It began with my sobriety and ended with a milestone one-year plan that will give me information that I need to commit to my career path. This transition has had significant impact. The elusive "who am I" has been addressed, not completely but addressed sufficiently so that the question no longer plagues me. I know from where I have come. I have gained significant insight from those around me who know me. All of this has been documented for my own personal use, and for my children someday. This process permitted me to eliminate outliers from my eight original career paths, reducing them to four. In addition, application of IMT models and concepts has allowed me to see one year into the future. With my new-found knowledge, I will listen and watch the doors close on three of the remaining four career paths, as there is only one path I am meant to take.
ContributorsRichardson, Trevor Woods (Author) / Kashiwagi, Dean (Thesis director) / Kashiwagi, Jacob (Committee member) / Industrial, Systems (Contributor) / Barrett, The Honors College (Contributor) / Del E. Webb Construction (Contributor)
Created2014-05
153848-Thumbnail Image.png
Description
ABSTRACT

The problem of litigation and disputes in the construction sector is a major impediment to countries’ development goals. The purpose of this paper is to investigate the problem of high legal costs and long delays that arise due to litigation involving project owners, designers, contractors and other construction parties

ABSTRACT

The problem of litigation and disputes in the construction sector is a major impediment to countries’ development goals. The purpose of this paper is to investigate the problem of high legal costs and long delays that arise due to litigation involving project owners, designers, contractors and other construction parties worldwide and in Saudi Arabia, as well as to give recommendation according to the outcomes of this research. The causes of litigious behavior in Saudi Arabia and other countries around the world were identified and documented, also the differences in litigation of the Saudi Arabian construction industry as compared to other countries were identified. Preliminary investigations revealed that there are some level of similarity in the nature of the causes. Thus, these causes were grouped into three main categories which are expectation factors, communications factors and documentation factors. Further research based on existing literature showed that the practices used to minimize litigation in the construction industry were investigated. The following delivery process were researched: design-build (DB) delivery method, Alliance Contracting, Construction Manager at Risk (CMAR), Best Value Approach, Integrated Project Delivery (IPD), and Public-Private Partnerships (PPPs), and the PIPS/PIRMS approach. These delivery methods were found to have issues, which means the methods by observation do not seem to be the ideal solution to minimize litigation in the construction industry. The only delivery method found to have no litigation issues was the PIPS/PIRMS approach.
ContributorsAlmutairi, Saud (Author) / Kashiwagi, Dean (Thesis advisor) / Sullivan, Kenneth (Committee member) / Kashiwagi, Jacob (Committee member) / Arizona State University (Publisher)
Created2015
153765-Thumbnail Image.png
Description
Modern Complex electronic system include multiple power domains and drastically varying power consumption patterns, requiring the use of multiple power conversion and regulation units. High frequency switching converters have been gaining prominence in the DC-DC converter market due to their high efficiency. Unfortunately, they are all subject to higher process

Modern Complex electronic system include multiple power domains and drastically varying power consumption patterns, requiring the use of multiple power conversion and regulation units. High frequency switching converters have been gaining prominence in the DC-DC converter market due to their high efficiency. Unfortunately, they are all subject to higher process variations jeopardizing stable operation of the power supply.

This research mainly focus on the technique to track changes in the dynamic loop characteristics of the DC-DC converters without disturbing the normal mode of operation using a white noise based excitation and correlation. White noise excitation is generated via pseudo random disturbance at reference and PWM input of the converter with the test signal being spread over a wide bandwidth, below the converter noise and ripple floor. Test signal analysis is achieved by correlating the pseudo-random input sequence with the output response and thereby accumulating the desired behavior over time and pulling it above the noise floor of the measurement set-up. An off-the shelf power converter, LM27402 is used as the DUT for the experimental verification. Experimental results show that the proposed technique can estimate converter's natural frequency and Q-factor within ±2.5% and ±0.7% error margin respectively, over changes in load inductance and capacitance.
ContributorsBakliwal, Priyanka (Author) / Ozev, Sule (Thesis advisor) / Bakkaloglu, Bertan (Committee member) / Kitchen, Jennifer (Committee member) / Arizona State University (Publisher)
Created2015
153833-Thumbnail Image.png
Description
Delays are a major cause for concern in the construction industry both globally and locally in Saudi Arabia. This paper identifies the main causes of delay in infrastructure projects in the holy city of Makkah (Saudi Arabia) and compares these with projects around the rest of the country and other

Delays are a major cause for concern in the construction industry both globally and locally in Saudi Arabia. This paper identifies the main causes of delay in infrastructure projects in the holy city of Makkah (Saudi Arabia) and compares these with projects around the rest of the country and other Gulf countries as well. Data were obtained from 49 infrastructure projects that were undertaken by the owner and were analyzed quantitatively to understand the severity and causes of delay. 10 risk factors were identified in this study and these factors were grouped into four categories. The average delay in infrastructure projects in the city of Makkah was found to be 39%. The most severe cause of delay was found to be the land acquisition factor. This highlights the critical land ownership and acquisition issues that is prevailing in Makkah. In addition to this, other factors include contractors’ lack of expertise, haphazard underground utilities (line services), and re-designing. It is concluded that majority of delays were caused from the owner’s side as compared to contractors, consultants, and other project’s stakeholders. This finding was in line with the research findings of the Gulf Countries Construction (GCC) Industry’s literature as well. This study will fill an important practice and research gap for improving the efficiency in project delivery for infrastructure projects in the holy city of Makkah and the Gulf countries at large.
ContributorsElawi, Ghazi Saad A (Author) / Kashiwagi, Dean (Thesis advisor) / Sullivan, Kenneth (Committee member) / Kashiwagi, Jacob (Committee member) / Arizona State University (Publisher)
Created2015