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Description
Flash memories are critical for embedded devices to operate properly but are susceptible to radiation effects, which make flash memory a key factor to improve the reliability of circuitry. This thesis describes the simulation techniques used to analyze and predict total ionizing dose (TID) effects on 90-nm technology Silicon Storage Technology (SST) SuperFlash Generation 3 devices. Silvaco Atlas is used for both device level design and simulation purposes.
The simulations consist of no radiation and radiation modeling. The no radiation modeling details the cell structure development and characterizes basic operations (read, erase and program) of a flash memory cell. The program time is observed to be approximately 10 μs while the erase time is approximately 0.1 ms.
The radiation modeling uses the fixed oxide charge method to analyze the TID effects on the same flash memory cell. After irradiation, a threshold voltage shift of the flash memory cell is observed. The threshold voltages of a programmed cell and an erased cell are reduced at an average rate of 0.025 V/krad.
The use of simulation techniques allows designers to better understand the TID response of a SST flash memory cell and to predict cell level TID effects without performing the costly in-situ irradiation experiments. The simulation and experimental results agree qualitatively. In particular, simulation results reveal that ‘0’ to ‘1’ errors but not ‘1’ to ‘0’ retention errors occur; likewise, ‘0’ to ‘1’ errors dominate experimental testing, which also includes circuitry effects that can cause ‘1’ to ‘0’ failures. Both simulation and experimental results reveal flash memory cell TID resilience to about 200 krad.
The simulations consist of no radiation and radiation modeling. The no radiation modeling details the cell structure development and characterizes basic operations (read, erase and program) of a flash memory cell. The program time is observed to be approximately 10 μs while the erase time is approximately 0.1 ms.
The radiation modeling uses the fixed oxide charge method to analyze the TID effects on the same flash memory cell. After irradiation, a threshold voltage shift of the flash memory cell is observed. The threshold voltages of a programmed cell and an erased cell are reduced at an average rate of 0.025 V/krad.
The use of simulation techniques allows designers to better understand the TID response of a SST flash memory cell and to predict cell level TID effects without performing the costly in-situ irradiation experiments. The simulation and experimental results agree qualitatively. In particular, simulation results reveal that ‘0’ to ‘1’ errors but not ‘1’ to ‘0’ retention errors occur; likewise, ‘0’ to ‘1’ errors dominate experimental testing, which also includes circuitry effects that can cause ‘1’ to ‘0’ failures. Both simulation and experimental results reveal flash memory cell TID resilience to about 200 krad.
ContributorsChen, Yitao (Author) / Holbert, Keith E. (Thesis advisor) / Clark, Lawrence T. (Committee member) / Allee, David R. (Committee member) / Arizona State University (Publisher)
Created2016
Description
This thesis describes the design of a Single Event Transient (SET) duration measurement test-structure on the Global Foundries (previously IBM) 32-nm silicon-on insulator (SOI) process. The test structure is designed for portability and allows quick design and implementation on a new process node. Such a test structure is critical in analyzing the effects of radiation on complementary metal oxide semi-conductor (CMOS) circuits. The focus of this thesis is the change in pulse width during propagation of SET pulse and build a test structure to measure the duration of a SET pulse generated in real time. This test structure can estimate the SET pulse duration with 10ps resolution. It receives the input SET propagated through a SET capture structure made using a chain of combinational gates. The impact of propagation of the SET in a >200 deep collection structure is studied. A novel methodology of deploying Thick Gate TID structure is proposed and analyzed to build multi-stage chain of combinational gates. Upon using long chain of combinational gates, the most critical issue of pulse width broadening and shortening is analyzed across critical process corners. The impact of using regular standard cells on pulse width modification is compared with NMOS and/or PMOS skewed gates for the chain of combinational gates. A possible resolution to pulse width change is demonstrated using circuit and layout design of chain of inverters, two and three inputs NOR gates. The SET capture circuit is also tested in simulation by introducing a glitch signal that mimics an individual ion strike that could lead to perturbation in SET propagation. Design techniques and skewed gates are deployed to dampen the glitch that occurs under the effect of radiation. Simulation results, layout structures of SET capture circuit and chain of combinational gates are presented.
ContributorsMasand, Lovish (Author) / Clark, Lawrence (Thesis advisor) / Holbert, Keith E. (Committee member) / Barnaby, Hugh (Committee member) / Arizona State University (Publisher)
Created2017
Description
Energy is one of the wheels on which the modern world runs. Therefore, standards and limits have been devised to maintain the stability and reliability of the power grid. This research shows a simple methodology for increasing the amount of Inverter-based Renewable Generation (IRG), which is also known as Inverter-based Resources (IBR), for that considers the voltage and frequency limits specified by the Western Electricity Coordinating Council (WECC) Transmission Planning (TPL) criteria, and the tie line power flow limits between the area-under-study and its neighbors under contingency conditions. A WECC power flow and dynamic file is analyzed and modified in this research to demonstrate the performance of the methodology. GE's Positive Sequence Load Flow (PSLF) software is used to conduct this research and Python was used to analyze the output data.
The thesis explains in detail how the system with 11% of IRG operated before conducting any adjustments (addition of IRG) and what procedures were modified to make the system run correctly. The adjustments made to the dynamic models are also explained in depth to give a clearer picture of how each adjustment affects the system performance. A list of proposed IRG units along with their locations were provided by SRP, a power utility in Arizona, which were to be integrated into the power flow and dynamic files. In the process of finding the maximum IRG penetration threshold, three sensitivities were also considered, namely, momentary cessation due to low voltages, transmission vs. distribution connected solar generation, and stalling of induction motors. Finally, the thesis discusses how the system reacts to the aforementioned modifications, and how IRG penetration threshold gets adjusted with regards to the different sensitivities applied to the system.
The thesis explains in detail how the system with 11% of IRG operated before conducting any adjustments (addition of IRG) and what procedures were modified to make the system run correctly. The adjustments made to the dynamic models are also explained in depth to give a clearer picture of how each adjustment affects the system performance. A list of proposed IRG units along with their locations were provided by SRP, a power utility in Arizona, which were to be integrated into the power flow and dynamic files. In the process of finding the maximum IRG penetration threshold, three sensitivities were also considered, namely, momentary cessation due to low voltages, transmission vs. distribution connected solar generation, and stalling of induction motors. Finally, the thesis discusses how the system reacts to the aforementioned modifications, and how IRG penetration threshold gets adjusted with regards to the different sensitivities applied to the system.
ContributorsAlbhrani, Hashem A M H S (Author) / Pal, Anamitra (Thesis advisor) / Holbert, Keith E. (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2020