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Description
A fully automated logic design methodology for radiation hardened by design (RHBD) high speed logic using fine grained triple modular redundancy (TMR) is presented. The hardening techniques used in the cell library are described and evaluated, with a focus on both layout techniques that mitigate total ionizing dose (TID) and

A fully automated logic design methodology for radiation hardened by design (RHBD) high speed logic using fine grained triple modular redundancy (TMR) is presented. The hardening techniques used in the cell library are described and evaluated, with a focus on both layout techniques that mitigate total ionizing dose (TID) and latchup issues and flip-flop designs that mitigate single event transient (SET) and single event upset (SEU) issues. The base TMR self-correcting master-slave flip-flop is described and compared to more traditional hardening techniques. Additional refinements are presented, including testability features that disable the self-correction to allow detection of manufacturing defects. The circuit approach is validated for hardness using both heavy ion and proton broad beam testing. For synthesis and auto place and route, the methodology and circuits leverage commercial logic design automation tools. These tools are glued together with custom CAD tools designed to enable easy conversion of standard single redundant hardware description language (HDL) files into hardened TMR circuitry. The flow allows hardening of any synthesizable logic at clock frequencies comparable to unhardened designs and supports standard low-power techniques, e.g. clock gating and supply voltage scaling.
ContributorsHindman, Nathan (Author) / Clark, Lawrence T (Thesis advisor) / Holbert, Keith E. (Committee member) / Barnaby, Hugh (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2012
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Description
The Solid State Transformer (SST) is an essential component in the FREEDM system. This research focuses on the modeling of the SST and the controller hardware in the loop (CHIL) implementation of the SST for the support of the FREEDM system demonstration. The energy based control strategy for a three-stage

The Solid State Transformer (SST) is an essential component in the FREEDM system. This research focuses on the modeling of the SST and the controller hardware in the loop (CHIL) implementation of the SST for the support of the FREEDM system demonstration. The energy based control strategy for a three-stage SST is analyzed and applied. A simplified average model of the three-stage SST that is suitable for simulation in real time digital simulator (RTDS) has been developed in this study. The model is also useful for general time-domain power system analysis and simulation. The proposed simplified av-erage model has been validated in MATLAB and PLECS. The accuracy of the model has been verified through comparison with the cycle-by-cycle average (CCA) model and de-tailed switching model. These models are also implemented in PSCAD, and a special strategy to implement the phase shift modulation has been proposed to enable the switching model simulation in PSCAD. The implementation of the CHIL test environment of the SST in RTDS is described in this report. The parameter setup of the model has been discussed in detail. One of the dif-ficulties is the choice of the damping factor, which is revealed in this paper. Also the grounding of the system has large impact on the RTDS simulation. Another problem is that the performance of the system is highly dependent on the switch parameters such as voltage and current ratings. Finally, the functionalities of the SST have been realized on the platform. The distributed energy storage interface power injection and reverse power flow have been validated. Some limitations are noticed and discussed through the simulation on RTDS.
ContributorsJiang, Youyuan (Author) / Ayyanar, Raja (Thesis advisor) / Holbert, Keith E. (Committee member) / Chowdhury, Srabanti (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Microprocessors are the processing heart of any digital system and are central to all the technological advancements of the age including space exploration and monitoring. The demands of space exploration require a special class of microprocessors called radiation hardened microprocessors which are less susceptible to radiation present outside the earth's

Microprocessors are the processing heart of any digital system and are central to all the technological advancements of the age including space exploration and monitoring. The demands of space exploration require a special class of microprocessors called radiation hardened microprocessors which are less susceptible to radiation present outside the earth's atmosphere, in other words their functioning is not disrupted even in presence of disruptive radiation. The presence of these particles forces the designers to come up with design techniques at circuit and chip levels to alleviate the errors which can be encountered in the functioning of microprocessors. Microprocessor evolution has been very rapid in terms of performance but the same cannot be said about its rad-hard counterpart. With the total data processing capability overall increasing rapidly, the clear lack of performance of the processors manifests as a bottleneck in any processing system. To design high performance rad-hard microprocessors designers have to overcome difficult design problems at various design stages i.e. Architecture, Synthesis, Floorplanning, Optimization, routing and analysis all the while maintaining circuit radiation hardness. The reference design `HERMES' is targeted at 90nm IBM G process and is expected to reach 500Mhz which is twice as fast any processor currently available. Chapter 1 talks about the mechanisms of radiation effects which cause upsets and degradation to the functioning of digital circuits. Chapter 2 gives a brief description of the components which are used in the design and are part of the consistent efforts at ASUVLSI lab culminating in this chip level implementation of the design. Chapter 3 explains the basic digital design ASIC flow and the changes made to it leading to a rad-hard specific ASIC flow used in implementing this chip. Chapter 4 talks about the triple mode redundant (TMR) specific flow which is used in the block implementation, delineating the challenges faced and the solutions proposed to make the flow work. Chapter 5 explains the challenges faced and solutions arrived at while using the top-level flow described in chapter 3. Chapter 6 puts together the results and analyzes the design in terms of basic integrated circuit design constraints.
ContributorsRamamurthy, Chandarasekaran (Author) / Clark, Lawrence T (Thesis advisor) / Holbert, Keith E. (Committee member) / Barnaby, Hugh J (Committee member) / Mayhew, David (Committee member) / Arizona State University (Publisher)
Created2013
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Description
Parkinson's disease is a neurodegenerative condition diagnosed on patients with

clinical history and motor signs of tremor, rigidity and bradykinesia, and the estimated

number of patients living with Parkinson's disease around the world is seven

to ten million. Deep brain stimulation (DBS) provides substantial relief of the motor

signs of Parkinson's disease patients. It

Parkinson's disease is a neurodegenerative condition diagnosed on patients with

clinical history and motor signs of tremor, rigidity and bradykinesia, and the estimated

number of patients living with Parkinson's disease around the world is seven

to ten million. Deep brain stimulation (DBS) provides substantial relief of the motor

signs of Parkinson's disease patients. It is an advanced surgical technique that is used

when drug therapy is no longer sufficient for Parkinson's disease patients. DBS alleviates the motor symptoms of Parkinson's disease by targeting the subthalamic nucleus using high-frequency electrical stimulation.

This work proposes a behavior recognition model for patients with Parkinson's

disease. In particular, an adaptive learning method is proposed to classify behavioral

tasks of Parkinson's disease patients using local field potential and electrocorticography

signals that are collected during DBS implantation surgeries. Unique patterns

exhibited between these signals in a matched feature space would lead to distinction

between motor and language behavioral tasks. Unique features are first extracted

from deep brain signals in the time-frequency space using the matching pursuit decomposition

algorithm. The Dirichlet process Gaussian mixture model uses the extracted

features to cluster the different behavioral signal patterns, without training or

any prior information. The performance of the method is then compared with other

machine learning methods and the advantages of each method is discussed under

different conditions.
ContributorsDutta, Arindam (Author) / Papandreou-Suppappola, Antonia (Thesis advisor) / Holbert, Keith E. (Committee member) / Bliss, Daniel W. (Committee member) / Arizona State University (Publisher)
Created2015
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Description
The subject of this thesis is distribution level load management using a pricing signal in a smart grid infrastructure. The project relates to energy management in a spe-cialized distribution system known as the Future Renewable Electric Energy Delivery and Management (FREEDM) system. Energy management through demand response is one of

The subject of this thesis is distribution level load management using a pricing signal in a smart grid infrastructure. The project relates to energy management in a spe-cialized distribution system known as the Future Renewable Electric Energy Delivery and Management (FREEDM) system. Energy management through demand response is one of the key applications of smart grid. Demand response today is envisioned as a method in which the price could be communicated to the consumers and they may shift their loads from high price periods to the low price periods. The development and deployment of the FREEDM system necessitates controls of energy and power at the point of end use.

In this thesis, the main objective is to develop the control model of the Energy Management System (EMS). The energy and power management in the FREEDM system is digitally controlled therefore all signals containing system states are discrete. The EMS is modeled as a discrete closed loop transfer function in the z-domain. A breakdown of power and energy control devices such as EMS components may result in energy con-sumption error. This leads to one of the main focuses of the thesis which is to identify and study component failures of the designed control system. Moreover, H-infinity ro-bust control method is applied to ensure effectiveness of the control architecture. A focus of the study is cyber security attack, specifically bad data detection in price. Test cases are used to illustrate the performance of the EMS control design, the effect of failure modes and the application of robust control technique.

The EMS was represented by a linear z-domain model. The transfer function be-tween the pricing signal and the demand response was designed and used as a test bed. EMS potential failure modes were identified and studied. Three bad data detection meth-odologies were implemented and a voting policy was used to declare bad data. The run-ning mean and standard deviation analysis method proves to be the best method to detect bad data. An H-infinity robust control technique was applied for the first time to design discrete EMS controller for the FREEDM system.
ContributorsMusani, Aatif (Author) / Heydt, Gerald (Thesis advisor) / Ayyanar, Raja (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2014
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Description
Due to increasing integration of renewable resources in the power grid, an efficient high power transmission system is needed in the near future to transfer energy from remote locations to the load centers. Gas Insulated Transmission Line (GIL) is a specialized high power transmission system, designed by Siemens, for applications

Due to increasing integration of renewable resources in the power grid, an efficient high power transmission system is needed in the near future to transfer energy from remote locations to the load centers. Gas Insulated Transmission Line (GIL) is a specialized high power transmission system, designed by Siemens, for applications requiring direct burial or vertical installation of the transmission line. GIL uses SF6 as an insulating medium. Due to unavoidable gas leakages and high global warming potential of SF6, there is a need to replace this insulating gas by some other possible alternative. Insulating foam materials are characterized by excellent dielectric properties as well as their reduced weight. These materials can find their application in GIL as high voltage insulators. Syntactic foam is a polymer based insulating foam. It consists of a large number of microspheres embedded in a polymer matrix.

The work in this thesis deals with the development of the selection proce-dure for an insulating foam for its application in GIL. All the steps in the process are demonstrated considering syntactic foam as an insulator. As the first step of the procedure, a small representative model of the insulating foam is built in COMSOL Multiphysics software with the help of AutoCAD and Excel VBA to analyze electric field distribution for the application of GIL. The effect of the presence of metal particles on the electric field distribution is also observed. The AC voltage withstand test is performed on the insulating foam samples according to the IEEE standards. The effect of the insulating foam on electrical parameters as well as transmission characteristics of the line is analyzed as the last part of the thesis. The results from all the simulations and AC voltage withstand test are ob-served to predict the suitability of the syntactic foam as an insulator in GIL.
ContributorsPendse, Harshada Ganesh (Author) / Karady, George G. (Thesis advisor) / Holbert, Keith E. (Committee member) / Ayyanar, Raja (Committee member) / Arizona State University (Publisher)
Created2014
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Description
The space environment comprises cosmic ray particles, heavy ions and high energy electrons and protons. Microelectronic circuits used in space applications such as satellites and space stations are prone to upsets induced by these particles. With transistor dimensions shrinking due to continued scaling, terrestrial integrated circuits are also increasingly susceptible

The space environment comprises cosmic ray particles, heavy ions and high energy electrons and protons. Microelectronic circuits used in space applications such as satellites and space stations are prone to upsets induced by these particles. With transistor dimensions shrinking due to continued scaling, terrestrial integrated circuits are also increasingly susceptible to radiation upsets. Hence radiation hardening is a requirement for microelectronic circuits used in both space and terrestrial applications.

This work begins by exploring the different radiation hardened flip-flops that have been proposed in the literature and classifies them based on the different hardening techniques.

A reduced power delay element for the temporal hardening of sequential digital circuits is presented. The delay element single event transient tolerance is demonstrated by simulations using it in a radiation hardened by design master slave flip-flop (FF). Using the proposed delay element saves up to 25% total FF power at 50% activity factor. The delay element is used in the implementation of an 8-bit, 8051 designed in the TSMC 130 nm bulk CMOS.

A single impinging ionizing radiation particle is increasingly likely to upset multiple circuit nodes and produce logic transients that contribute to the soft error rate in most modern scaled process technologies. The design of flip-flops is made more difficult with increasing multi-node charge collection, which requires that charge storage and other sensitive nodes be separated so that one impinging radiation particle does not affect redundant nodes simultaneously. We describe a correct-by-construction design methodology to determine a-priori which hardened FF nodes must be separated, as well as a general interleaving scheme to achieve this separation. We apply the methodology to radiation hardened flip-flops and demonstrate optimal circuit physical organization for protection against multi-node charge collection.

Finally, the methodology is utilized to provide critical node separation for a new hardened flip-flop design that reduces the power and area by 31% and 35% respectively compared to a temporal FF with similar hardness. The hardness is verified and compared to other published designs via the proposed systematic simulation approach that comprehends multiple node charge collection and tests resiliency to upsets at all internal and input nodes. Comparison of the hardness, as measured by estimated upset cross-section, is made to other published designs. Additionally, the importance of specific circuit design aspects to achieving hardness is shown.
ContributorsShambhulingaiah, Sandeep (Author) / Clark, Lawrence (Thesis advisor) / Holbert, Keith E. (Committee member) / Seo, Jae sun (Committee member) / Allee, David (Committee member) / Arizona State University (Publisher)
Created2015
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Description
Ever reducing time to market, along with short product lifetimes, has created a need to shorten the microprocessor design time. Verification of the design and its analysis are two major components of this design cycle. Design validation techniques can be broadly classified into two major categories: simulation based approaches and

Ever reducing time to market, along with short product lifetimes, has created a need to shorten the microprocessor design time. Verification of the design and its analysis are two major components of this design cycle. Design validation techniques can be broadly classified into two major categories: simulation based approaches and formal techniques. Simulation based microprocessor validation involves running millions of cycles using random or pseudo random tests and allows verification of the register transfer level (RTL) model against an architectural model, i.e., that the processor executes instructions as required. The validation effort involves model checking to a high level description or simulation of the design against the RTL implementation. Formal techniques exhaustively analyze parts of the design but, do not verify RTL against the architecture specification. The focus of this work is to implement a fully automated validation environment for a MIPS based radiation hardened microprocessor using simulation based approaches. The basic framework uses the classical validation approach in which the design to be validated is described in a Hardware Definition Language (HDL) such as VHDL or Verilog. To implement a simulation based approach a number of random or pseudo random tests are generated. The output of the HDL based design is compared against the one obtained from a "perfect" model implementing similar functionality, a mismatch in the results would thus indicate a bug in the HDL based design. Effort is made to design the environment in such a manner that it can support validation during different stages of the design cycle. The validation environment includes appropriate changes so as to support architecture changes which are introduced because of radiation hardening. The manner in which the validation environment is build is highly dependent on the specifications of the perfect model used for comparisons. This work implements the validation environment for two MIPS simulators as the reference model. Two bugs have been discovered in the RTL model, using simulation based approaches through the validation environment.
ContributorsSharma, Abhishek (Author) / Clark, Lawrence (Thesis advisor) / Holbert, Keith E. (Committee member) / Shrivastava, Aviral (Committee member) / Arizona State University (Publisher)
Created2011
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Description
In the search for chemical biosensors designed for patient-based physiological applications, non-invasive diagnostic approaches continue to have value. The work described in this thesis builds upon previous breath analysis studies. In particular, it seeks to assess the adsorptive mechanisms active in both acetone and ethanol biosensors designed for

In the search for chemical biosensors designed for patient-based physiological applications, non-invasive diagnostic approaches continue to have value. The work described in this thesis builds upon previous breath analysis studies. In particular, it seeks to assess the adsorptive mechanisms active in both acetone and ethanol biosensors designed for breath analysis. The thermoelectric biosensors under investigation were constructed using a thermopile for transduction and four different materials for biorecognition. The analytes, acetone and ethanol, were evaluated under dry-air and humidified-air conditions. The biosensor response to acetone concentration was found to be both repeatable and linear, while the sensor response to ethanol presence was also found to be repeatable. The different biorecognition materials produced discernible thermoelectric responses that were characteristic for each analyte. The sensor output data is presented in this report. Additionally, the results were evaluated against a mathematical model for further analysis. Ultimately, a thermoelectric biosensor based upon adsorption chemistry was developed and characterized. Additional work is needed to characterize the physicochemical action mechanism.
ContributorsWilson, Kimberly (Author) / Guilbeau, Eric (Thesis advisor) / Pizziconi, Vincent (Thesis advisor) / LaBelle, Jeffrey (Committee member) / Arizona State University (Publisher)
Created2011
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Description
Underground transmission cables in power systems are less likely to experience electrical faults, however, resulting outage times are much greater in the event that a failure does occur. Unlike overhead lines, underground cables are not self-healing from flashover events. The faulted section must be located and repaired before the line

Underground transmission cables in power systems are less likely to experience electrical faults, however, resulting outage times are much greater in the event that a failure does occur. Unlike overhead lines, underground cables are not self-healing from flashover events. The faulted section must be located and repaired before the line can be put back into service. Since this will often require excavation of the underground duct bank, the procedure to repair the faulted section is both costly and time consuming. These added complications are the prime motivators for developing accurate and reliable ratings for underground cable circuits.

This work will review the methods by which power ratings, or ampacity, for underground cables are determined and then evaluate those ratings by making comparison with measured data taken from an underground 69 kV cable, which is part of the Salt River Project (SRP) power subtransmission system. The process of acquiring, installing, and commissioning the temperature monitoring system is covered in detail as well. The collected data are also used to evaluate typical assumptions made when determining underground cable ratings such as cable hot-spot location and ambient temperatures.

Analysis results show that the commonly made assumption that the deepest portion of an underground power cable installation will be the hot-spot location does not always hold true. It is shown that distributed cable temperature measurements can be used to locate the proper line segment to be used for cable ampacity calculations.
ContributorsStowers, Travis (Author) / Tylavsky, Daniel (Thesis advisor) / Karady, George G. (Committee member) / Holbert, Keith E. (Committee member) / Arizona State University (Publisher)
Created2015