Matching Items (13)
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- All Subjects: solar
- All Subjects: RRAM
- Creators: Electrical Engineering Program
- Member of: Barrett, The Honors College Thesis/Creative Project Collection
Description
The Phoenix CubeSat is a 3U Earth imaging CubeSat which will take infrared (IR) photos of cities in the United Stated to study the Urban Heat Island Effect, (UHI) from low earth orbit (LEO). It has many different components that need to be powered during the life of its mission. The only power source during the mission will be its solar panels. It is difficult to calculate power generation from solar panels by hand because of the different orientations the satellite will be positioned in during orbit; therefore, simulation will be used to produce power generation data. Knowing how much power is generated is integral to balancing the power budget, confirming whether there is enough power for all the components, and knowing whether there will be enough power in the batteries during eclipse. This data will be used to create an optimal design for the Phoenix CubeSat to accomplish its mission.
ContributorsBarakat, Raymond John (Author) / White, Daniel (Thesis director) / Kitchen, Jennifer (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2017-05
Description
A hybrid PV/T module was built, consisting of a thermal liquid heating system and a photovoltaic module system that combine in a hybrid format. This report will discuss the work on the project from Fall 2012 to Spring 2013 and the extended section on the economics for the Honors Thesis. Three stages of experiments were completed. Stage 1 showed our project was functional as we were able to verify our panel produced electricity and increased the temperature of water flowing in the system by 0.65°C. Stage 2 testing included “gluing” the flow system to the back of the panel resulting in an average increase of 4.76°C in the temperature of the water in the system. Stage 3 testing included adding insulating foam to the module which resulted in increasing the average temperature of the water in our flow system by 6.95°C. The economic calculations show the expected energy cost savings for Arizona residents.
ContributorsHaines, Brent Robert (Author) / Roedel, Ronald (Thesis director) / Aberle, James (Committee member) / Rauch, Dawson (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2013-05
Description
A hybrid PV/T module was built, consisting of a thermal liquid heating system and a photovoltaic module system that combine in a hybrid format. This report will discuss the work on the project from Fall 2012 to Spring 2013. Three stages of experiments were completed. Stage 1 showed our project was functional as we were able to verify our panel produced electricity and increased the temperature of water flowing in the system by 0.65°C. Stage 2 testing included “gluing” the flow system to the back of the panel resulting in an average increase of 4.76°C in the temperature of the water in the system. Stage 3 testing included adding insulating foam to the module which resulted in increasing the average temperature of the water in our flow system by 6.95°C.
ContributorsDenke, Steven Michael (Author) / Roedel, Ron (Thesis director) / Aberle, James (Committee member) / Rauch, Dawson (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2013-05
Description
Resistive Random Access Memory (RRAM) is an emerging type of non-volatile memory technology that seeks to replace FLASH memory. The RRAM crossbar array is advantageous in its relatively small cell area and faster read latency in comparison to NAND and NOR FLASH memory; however, the crossbar array faces design challenges of its own in sneak-path currents that prevent proper reading of memory stored in the RRAM cell. The Current Sensing Amplifier is one method of reading RRAM crossbar arrays. HSpice simulations are used to find the associated reading delays of the Current Sensing Amplifier with respect to various sizes of RRAM crossbar arrays, as well as the largest array size compatible for accurate reading. It is found that up to 1024x1024 arrays are achievable with a worst-case read delay of 815ps, and it is further likely 2048x2048 arrays are able to be read using the Current Sensing Amplifier. In comparing the Current Sensing Amplifier latency results with previously obtained latency results from the Voltage Sensing Amplifier, it is shown that the Voltage Sensing Amplifier reads arrays in sizes up to 256x256 faster while the Current Sensing Amplifier reads larger arrays faster.
ContributorsMoore, Jenna Barber (Author) / Yu, Shimeng (Thesis director) / Liu, Rui (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-12
Description
This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a RRAM cell (32x32 memory array). The purpose of this sweep across the RRAM is to measure and calculate the high and low resistance state value over a specified amount of testing cycles. With each cell having a unique output of high and low resistance states a unique characterization of each RRAM cell is able to be developed. Once the memory is characterized, the specific RRAM cell that was tested is then able to be used in a varying amount of applications for different things based on its uniqueness. Due to an inability to procure a packaged RRAM cell, a Mock-RRAM was instead designed in order to emulate the same behavior found in a RRAM cell.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.
ContributorsDobrin, Ryan Christopher (Co-author) / Halden, Matthew (Co-author) / Hall, Tanner (Co-author) / Barnaby, Hugh (Thesis director) / Kitchen, Jennifer (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2019-05
Description
Growing up in Ghana West Africa, I realized there were a few major obstacles hindering the education of the youth. One of them was the consistent supply of all year-round power. Therefore, pursuing a career in power electronics, I decided to research and implement a budget-friendly DC-AC converter that can take power from a DC source such as a solar panel to make AC power, suitable for grid-implementation. This project was undertaken with two other colleagues (Ian Vogt and Brett Fennelly), as our Senior Design Capstone project. My colleagues primarily researched into the "advanced" part of the converter such as Volt-VAR, Maximum Power Point Tracking (MPPT), and variable power factor, making the Capstone project be dubbed as "Smart Inverter". In this paper, I elaborate on the entire process of my research and simulation, through the design and layout of the PCB board to milling, soldering and testing. That was my contribution to the capstone project. After testing the board, it was concluded that although the inverter was intended to be the very inexpensive, some electrical and design principles could not be compromised. The converter did successfully invert DC power to AC, but it was only at low voltage levels; it could not withstand the higher voltages. This roadblock stymied the testing of advanced functionalities, paving way for an avenue of further research and implementation.
ContributorsAsigbekye, John (Author) / Ayyanar, Raja (Thesis director) / Sedillo, James (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2018-05
Description
The project described here is a solar powered intrusion detection system consisting of three modules: a battery recharging circuit, a laser emitter and photodetector pair, and a Wi- Fi connectivity board. Over the preceding seven months, great care has been taken for the design and construction of this system. The first three months were spent researching and selecting suitable IC's and external components (e.g. solar panel, batteries, etc.). Then, the next couple of months were spent ordering specific materials and equipment for the construction of our prototype. Finally, the last two months were used to build a working prototype, with a substantial amount of time used for perfecting our system's packaging and operation. This report will consist of a detailed discussion of our team's research, design activities, prototype implementation, final budget, and final schedule. Technical discussion of the concepts behind our design will assist with understanding the design activities and prototype implementation sections that will follow. Due to the generous funding of the group from the Barrett Honors College, our overall budget available for the project was $1600. Of that amount, only $334.51 was spent on the actual system components, with $829.42 being spent on the equipment and materials needed for the testing and construction of the prototype. As far as the schedule goes, we are essentially done with the project. The only tasks left to finish are a successful defense of the project at the oral presentation on Friday, 29 March 2013, followed by a successful demo on 26 April 2013.
ContributorsTroyer, Nicole L. (Co-author) / Shtayer, Idan (Co-author) / Guise, Chris (Co-author) / Kozicki, Michael (Thesis director) / Roedel, Ronald (Committee member) / Goodnick, Stephen (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2013-05
Description
RRAM is an emerging technology that looks to replace FLASH NOR and possibly NAND memory. It is attractive because it uses an adjustable resistance and does not rely on charge; in the sub-10nm feature size circuitry this is critical. However, RRAM cross-point arrays suffer tremendously from leakage currents that prevent proper readings in larger array sizes. In this research an exponential IV selector was added to each cell to minimize this current. Using this technique the largest array-size supportable was determined to be 512x512 cells using the conventional voltage sense amplifier by HSPICE simulations. However, with the increase in array size, the sensing latency also remarkably increases due to more sneak path currents, approaching 873 ns for the 512x512 array.
ContributorsMadler, Ryan Anton (Author) / Yu, Shimeng (Thesis director) / Cao, Yu (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
Description
Wire connected solar cells are a promising new technology that can increase the efficiency and reduce the cost of solar modules. The use of wire rather than ribbon bus bars can lead to reduced shading, better light trapping, and reduced material costs, all while eliminating the need for soldering. This research first analyzes the optimal wire gauge to reduce cracking and improve efficiency. Wire sizes between 20 AWG and 28 AWG were tested, with the optimal size being between 24 AWG and 26 AWG for the ethylene vinyl acetate (EVA) layer used in the module. A polyethylene sheet was then added between the wires and EVA layer to prevent the EVA from running underneath the wires during lamination, ultimately allowing for a more uniform contact and only a slight reduction in quantum efficiency. Then, a comparison between tinned copper wires and indium coated copper wires is shown. A mini-module efficiency of 20.0% has been achieved using tinned copper wires, while indium coated copper wires have produced a mini-module efficiency of 21.2%. Thus, tinned copper wires can be a viable alternative to indium coated copper wires, depending on the needs of the customers and the current price of indium. The module design throughout the research utilizes a planar assembly method, which improves the ease of manufacturing for wire interconnection technology. A two-cell base component is constructed and shown, with the intended future application of making large wire connected modules. Finally, wire applications in both single-cell and four-cell flexible modules are explored, with an efficiency of 18.65% achieved on a single-cell, flexible, heterojunction solar module using wire interconnections. A fully flexible four-cell string is developed, and future recommendations for related research are included.
ContributorsTyler, Kevin Daniel (Author) / Bowden, Stuart (Thesis director) / Herasimenka, Stanislau (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2015-12
Description
The honors thesis presented in this document describes an extension to an electrical engineering capstone project whose scope is to develop the receiver electronics for an RF interrogator. The RF interrogator functions by detecting the change in resonant frequency of (i.e, frequency of maximum backscatter from) a target resulting from an environmental input. The general idea of this honors project was to design three frequency selective surfaces that would act as surrogate backscattering or reflecting targets that each contains a distinct frequency response. Using 3-D electromagnetic simulation software, three surrogate targets exhibiting bandpass frequency responses at distinct frequencies were designed and presented in this thesis.
ContributorsSisk, Ryan Derek (Author) / Aberle, James (Thesis director) / Chakraborty, Partha (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2021-05