Matching Items (9)
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- All Subjects: RRAM
- All Subjects: Technology
- Creators: Electrical Engineering Program
Description
The Lightning Audio capstone group, consisting of Brian Boerhinger, Rahul Nandan, Jaime Ramirez, and Niccolo Magnotto (myself), united in the effort to prove the feasibility of a consumer grade plasma arc speaker. This was achieved in group's prototype design, which demonstrates the potential for a refined product in its conventional interfacing, casing, size, safety, and aesthetics. If the potential for an excellent ionization-based loudspeaker product were realized, it would be highly profitable in its reasonable cost of production, novelty, and place in a large and fitting market.
ContributorsMagnotto, Niccolo John (Author) / Roedel, Ronald (Thesis director) / Huffman, James (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2014-05
Description
Resistive Random Access Memory (RRAM) is an emerging type of non-volatile memory technology that seeks to replace FLASH memory. The RRAM crossbar array is advantageous in its relatively small cell area and faster read latency in comparison to NAND and NOR FLASH memory; however, the crossbar array faces design challenges of its own in sneak-path currents that prevent proper reading of memory stored in the RRAM cell. The Current Sensing Amplifier is one method of reading RRAM crossbar arrays. HSpice simulations are used to find the associated reading delays of the Current Sensing Amplifier with respect to various sizes of RRAM crossbar arrays, as well as the largest array size compatible for accurate reading. It is found that up to 1024x1024 arrays are achievable with a worst-case read delay of 815ps, and it is further likely 2048x2048 arrays are able to be read using the Current Sensing Amplifier. In comparing the Current Sensing Amplifier latency results with previously obtained latency results from the Voltage Sensing Amplifier, it is shown that the Voltage Sensing Amplifier reads arrays in sizes up to 256x256 faster while the Current Sensing Amplifier reads larger arrays faster.
ContributorsMoore, Jenna Barber (Author) / Yu, Shimeng (Thesis director) / Liu, Rui (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-12
Description
This thesis outlines the hand-held memory characterization testing system that is to be created into a PCB (printed circuit board). The circuit is designed to apply voltages diagonally through a RRAM cell (32x32 memory array). The purpose of this sweep across the RRAM is to measure and calculate the high and low resistance state value over a specified amount of testing cycles. With each cell having a unique output of high and low resistance states a unique characterization of each RRAM cell is able to be developed. Once the memory is characterized, the specific RRAM cell that was tested is then able to be used in a varying amount of applications for different things based on its uniqueness. Due to an inability to procure a packaged RRAM cell, a Mock-RRAM was instead designed in order to emulate the same behavior found in a RRAM cell.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.
The final testing circuit and Mock-RRAM are varied and complex but come together to be able to produce a measured value of the high resistance and low resistance state. This is done by the Arduino autonomously digitizing the anode voltage, cathode voltage, and output voltage. A ramp voltage that sweeps from 1V to -1V is applied to the Mock-RRAM acting as an input. This ramp voltage is then later defined as the anode voltage which is just one of the two nodes connected to the Mock-RRAM. The cathode voltage is defined as the other node at which the voltage drops across the Mock-RRAM. Using these three voltages as input to the Arduino, the Mock-RRAM path resistance is able to be calculated at any given point in time. Conducting many test cycles and calculating the high and low resistance values allows for a graph to be developed of the chaotic variation of resistance state values over time. This chaotic variation can then be analyzed further in the future in order to better predict trends and characterize the RRAM cell that was tested.
Furthermore, the interchangeability of many devices on the PCB allows for the testing system to do more in the future. Ports have been added to the final PCB in order to connect a packaged RRAM cell. This will allow for the characterization of a real RRAM memory cell later down the line rather than a Mock-RRAM as emulation. Due to the autonomous testing, very few human intervention is needed which makes this board a great baseline for others in the future looking to add to it and collect larger pools of data.
ContributorsDobrin, Ryan Christopher (Co-author) / Halden, Matthew (Co-author) / Hall, Tanner (Co-author) / Barnaby, Hugh (Thesis director) / Kitchen, Jennifer (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2019-05
Description
RRAM is an emerging technology that looks to replace FLASH NOR and possibly NAND memory. It is attractive because it uses an adjustable resistance and does not rely on charge; in the sub-10nm feature size circuitry this is critical. However, RRAM cross-point arrays suffer tremendously from leakage currents that prevent proper readings in larger array sizes. In this research an exponential IV selector was added to each cell to minimize this current. Using this technique the largest array-size supportable was determined to be 512x512 cells using the conventional voltage sense amplifier by HSPICE simulations. However, with the increase in array size, the sensing latency also remarkably increases due to more sneak path currents, approaching 873 ns for the 512x512 array.
ContributorsMadler, Ryan Anton (Author) / Yu, Shimeng (Thesis director) / Cao, Yu (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2016-05
Description
Lossy compression is a form of compression that slightly degrades a signal in ways that are ideally not detectable to the human ear. This is opposite to lossless compression, in which the sample is not degraded at all. While lossless compression may seem like the best option, lossy compression, which is used in most audio and video, reduces transmission time and results in much smaller file sizes. However, this compression can affect quality if it goes too far. The more compression there is on a waveform, the more degradation there is, and once a file is lossy compressed, this process is not reversible. This project will observe the degradation of an audio signal after the application of Singular Value Decomposition compression, a lossy compression that eliminates singular values from a signal’s matrix.
ContributorsHirte, Amanda (Author) / Kosut, Oliver (Thesis director) / Bliss, Daniel (Committee member) / Electrical Engineering Program (Contributor, Contributor) / Barrett, The Honors College (Contributor)
Created2021-05
Description
This honors thesis explores the potential use of LoRa technology for detecting moisture in a diaper. Tests of both onboard and external humidity sensors coupled with LoRa transmission are incredibly promising. The potential scale of the final device also shows much promise, measuring smaller than a U.S. dime. However, the estimated cost for producing these proof-of-concept units in bulk is $19.41 per unit. While this is believed to be a pessimistic estimate of the price, the cost of production remains too high regardless for large-scale implementation. The thesis concludes by emphasizing the need for further research and development to optimize the design and reduce the cost of production. Despite the limitations imposed by price, the idea of using LoRa in detecting moisture in a diaper remains intriguing and promising, however, RFID technology has many advantages, such as size, cost, and passive power features.
ContributorsBetlaf, Garrett (Author) / Aberle, James (Thesis director) / McDonald, James (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor)
Created2023-05
Description
In the world we live in today, nothing is impossible. Due to the advancements of technology, humans around the globe are able to hold computers that fit within the size of their pocket. These computers can do marvelous things, however run off batteries. These batteries need to be charged and up until a little while ago there was only one option available: wired chargers; however, because of the advancement of technology society has created a way to transfer power via magnetic fields. Now this concept has been around for a long time since the days of Nikola Tesla but just recently society has been able to apply his discoveries to charging these computers in our pockets. Unfortunately, the current models of these chargers come with a drawback as they are less efficient than wired chargers. However, this is the question our group has set out to answer. Is there any way possible to improve the efficiency of these wireless chargers so they are equal or even more efficient than wired chargers. This paper explores how to improve the efficiency in wireless chargers. Through research, simulations and testing the group has discovered areas that efficiency can be improved as well as makes recommendations to change the current wireless chargers on the market today. This paper also explores future applications of wireless chargers that can not only make life much easier but could also save lives in some cases. These applications can have many effects on hospitality, the medical field, as well as the supply chain and logistics of America.
ContributorsMcCulley, Matthew Alan (Co-author) / Cole, Kennedy (Co-author) / Chickamenahalli, Shamala (Thesis director) / Chakrabarti, Chaitali (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2020-05
Description
The Founders Lab Thesis tasked each team with taking an idea and trying to form a business out of it. In the process, the thesis director would be there to guide each team and provide expertise where needed. The venture that was assigned originally to our team was a posture correcting device, however after numerous attempts to correspond reliably with the developers of this technology, it was decided that the team should move on to a new idea. Therefore, our team took on a venture named Altion Security: an initiative with the main goal being the safekeeping of customers interests. The product that we were tasked with is a bike alarm that simply rings out when it detects someone tampering with it. This product is a solution to the problem of bike thefts. 2 million bikes are stolen each year in North America, which translates roughly to a theft every 30 seconds (Project 529).
There are quite a few readily available products that one can buy if one looks past some of their flaws. A lot of these alarms either require a user to carry an extra communication device, or they are too big or expensive. The proposed solution merges all desirable features of a bike alarm into one module. In light of this, surveys were conducted to ascertain what these qualities would need to be. The top considerations for purchasing this alarm were how costly it would be, the false detection rate, and also the battery life. Additionally, the features that were most requested was the inclusion of a GPS and a camera. In order to incorporate these features, a three year plan was formulated which would culminate into a bike network in which each bike could communicate with other bikes. This would allow for an IOT network to be established, thus far exceeding expectations. The price point for this alarm is USD $10.00-15.00 and can come in a variety of colors. Additionally, this concept can be applied to many different scenarios, from protecting boats/jet skis and other aquatic vehicles, to houses as well. Furthermore, one could miniaturize this technology to be used in jewelry or accessories.
There are quite a few readily available products that one can buy if one looks past some of their flaws. A lot of these alarms either require a user to carry an extra communication device, or they are too big or expensive. The proposed solution merges all desirable features of a bike alarm into one module. In light of this, surveys were conducted to ascertain what these qualities would need to be. The top considerations for purchasing this alarm were how costly it would be, the false detection rate, and also the battery life. Additionally, the features that were most requested was the inclusion of a GPS and a camera. In order to incorporate these features, a three year plan was formulated which would culminate into a bike network in which each bike could communicate with other bikes. This would allow for an IOT network to be established, thus far exceeding expectations. The price point for this alarm is USD $10.00-15.00 and can come in a variety of colors. Additionally, this concept can be applied to many different scenarios, from protecting boats/jet skis and other aquatic vehicles, to houses as well. Furthermore, one could miniaturize this technology to be used in jewelry or accessories.
ContributorsOgunmefun, Adeoluwa (Co-author) / Gong, Alan (Co-author) / Parra, Rocio Ivette (Co-author) / Byrne, Jared (Thesis director) / Sebold, Brent (Committee member) / Electrical Engineering Program (Contributor) / Barrett, The Honors College (Contributor)
Created2020-05
Description
Most machine learning algorithms, and specifically neural networks, utilize vector-matrix multiplication (VMM) to process information, but these calculations are CPU intensive and can have long run-times. This issue is fundamentally outlined by the von Neumann bottleneck. Because of this undesirable expense associated with performing VMM via software, the exploration of new ways to perform the same calculations via hardware have grown more popular. When performed with hardware that is specialized to perform these calculations, VMM becomes far more power-efficient and less time consuming. This project expands upon those principles and seeks to validate the use of RRAM in this hardware.
The flexibility of the conductance of RRAM makes these devices a strong contender for hardware-driven VMM calculation for neural network computing. The conductance of these devices is affected by the pulse width of a voltage signal sent across the devices at each node. This pulse is produced on-chip and can be modified by user inputs. The design of this pulse- producing circuit, as well as the simulated and physical functionality of the design, is discussed in this Honors Thesis.
Simulation and physical testing of the pulse-producing design on the ASIC have verified correct operation of the design. This operation is imperative to the future ability of the ASIC to perform accurate VMM.
ContributorsPearson, Katherine (Author) / Barnaby, Hugh (Thesis director) / Wilson, Donald (Committee member) / Barrett, The Honors College (Contributor) / Electrical Engineering Program (Contributor) / School of International Letters and Cultures (Contributor)
Created2022-05