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201873 https://hdl.handle.net/2286/R.2.N.201873 http://rightsstatements.org/vocab/InC/1.0/ All Rights Reserved 2025 89 pages Masters Thesis Academic theses en Jagdish Patil, Girish Ariel Tongay, Seth Yang, Sui Sanchez Esqueda, Ivan Arizona State University Partial requirement for: M.S., Arizona State University, 2025 Field of study: Materials Science and Engineering Scaling down the integrated circuit technology to compute faster with a minimum energy requirement and to densify digital information with high reliability has been the predominant challenge across generations. However, in the contemporary period, scaling has progressed to a point where the general scaling principles no longer apply, and there is a lack of concrete roadmap for scaling down integrated circuits (ICs). This imposes new challenges on the scientific community working on semiconductor electronics. There is a need to address both Front-end-of-line (FEOL) and Back-end-of-line (BEOL) processes. Extensive and focused research work needs to be done to investigate scaling effects impacting BEOL processes.Resistivity scaling of interconnect metals within any device affects the device performance. For transistors beyond the 5 nm node, Cu (copper) as an interconnect metal tends to have higher resistivity. In my work, I have extensively reviewed different metals with low ρo x λo (resistivity scaling factor) as a potential replacement for Cu and addressed electron surface and grain boundary scattering. This work revolves around depositing ruthenium (Ru) thin film on a sapphire substrate with surface plane oriented along [0001], [11-20], and [10-10] using the sputter deposition technique. Additionally, I have also studied the microstructure, surface, and transport properties of the deposited film. X-Ray Diffractometry (XRD) data reveal the epitaxial nature of the films deposited on C-plane [0001] sapphire substrates, and the Ru film deposited on [11-20] and [10-10] exhibits well-defined texture. Electron backscattered diffraction (EBSD) pole figures support XRD data. I have studied both the substrate surface where the thin film grows and the surface of the thin film after complete deposition using atomic force microscopy (AFM). Comprehensively, I have developed a process parameter to develop crystalline Ru thin films and mapped their parameters, like surface roughness and grain size, with resistivity, following Fuchs-Sondheimer (FS) and Mayadas-Shatzkes (MS) models. Materials Science Magnetron Sputter Deposition of Ruthenium Thin Film for Next Generation Interconnects