2026-05-23T21:04:43Zhttps://keep.lib.asu.edu/oai/request

oai:keep.lib.asu.edu:node-2001222025-04-04T22:37:29Zoai_pmh:alloai_pmh:repo_items

200122 https://hdl.handle.net/2286/R.2.N.200122 http://rightsstatements.org/vocab/InC/1.0/ http://creativecommons.org/licenses/by-nc-sa/4.0 2025-05 16 pages Keylon, Lucas Keylon, Lucas Osburn, Steven Guzy, Ryan Barrett, The Honors College Computer Science and Engineering Program This paper presents the development of a continuous integration (CI) pipeline designed to automate the FPGA design workflow, specifically for PolarFire FPGA projects. The pipeline leverages a GitHub runner to execute predefined tasks via YAML scripts, which facilitate the generation of automation scripts for FPGA software. Central to the implementation are two Python scripts: generate.py, which creates multiple TCL scripts based on configuration data, and generate_json.py, which dynamically generates the design_configuration.json file required for the project setup. The CI pipeline enables remote execution of FPGA scripts, reducing the need for multiple installations of heavy software and optimizing the debugging process by eliminating monotonous tasks. The pipeline also allows for the efficient management of FPGA design files, enhancing reproducibility and streamlining the synthesis, simulation, and implementation phases of FPGA projects. The paper outlines the challenges encountered during the implementation, such as command-line execution complexities and recursive automation issues, and concludes with reflections on the benefits and considerations of incorporating automation into FPGA workflows. Automation json yaml tcl FPGA Script Continuous Integration Pipeline Continuous Integration Pipeline for FPGA Script Automation