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193611 https://hdl.handle.net/2286/R.2.N.193611 http://rightsstatements.org/vocab/InC/1.0/ All Rights Reserved 2024 58 pages Masters Thesis Academic theses Text eng Raghavendra, Chinmaye Ozev, Sule Bakkaloglu, Bertan Kitchen, Jennifer Arizona State University Partial requirement for: M.S., Arizona State University, 2024 Field of study: Electrical Engineering Integrating analog circuits with the most advanced digitally-tuned processes increases the defect rates and the risk of in-field wear out. Coupled with the reduced accessibility arising from this level of integration, increasing defect rates necessitate systematic approaches to analog testing. Structural built-in self-test (BIST) for analog circuits can reduce test development complexity. Proposing a robust and low-cost structural BIST method for analog circuits. The proposed method relies on perturbing the analog circuit at an injection point and observing the result at an observation point as a digitally measurable time delay. Injection can be achieved via simple ON/OFF keying while the observation can be achieved by a self-referencing comparator. Multiple injection points can be selected at low cost (single transistor) while the observation circuit can be shared across many injection points and different circuit blocks. Electrical Engineering Built-in Self-Test for Monitoring Analog Circuits