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          <dc:identifier>https://hdl.handle.net/2286/R.2.N.190977</dc:identifier>
                  <dc:rights>http://rightsstatements.org/vocab/InC/1.0/</dc:rights>
          <dc:rights>All Rights Reserved</dc:rights>
                  <dc:date>2023</dc:date>
                  <dc:format>103 pages</dc:format>
                  <dc:type>Doctoral Dissertation</dc:type>
          <dc:type>Academic theses</dc:type>
          <dc:type>Text</dc:type>
                  <dc:language>eng</dc:language>
                  <dc:contributor>Xie, Jing</dc:contributor>
          <dc:contributor>Sanchez Esqueda, Ivan</dc:contributor>
          <dc:contributor>Fu, Houqiang</dc:contributor>
          <dc:contributor>Kozicki, Michael</dc:contributor>
          <dc:contributor>Marinella, Matthew</dc:contributor>
          <dc:contributor>Arizona State University</dc:contributor>
                  <dc:description>Partial requirement for: Ph.D., Arizona State University, 2023</dc:description>
          <dc:description>Field of study: Electrical Engineering</dc:description>
          <dc:description>Modern Complementary-Metal-Oxide-Semiconductor (CMOS) technologies are facing critical challenges: scaling channel lengths below ~10 nm is hindered by significant transport degradation as bulk semiconductors (i.e., silicon) are thinned down, energy consumption is affected by short-channel effects and off-state leakage, and conventional von Neumann computing architectures face serious bottlenecks affecting performance and efficiency (energy consumption and throughput). Neuromorhic and/or in-memory computing architectures using resistive random-access memory (RRAM) crossbar arrays are promising candidates to mitigate these bottlenecks and to circumvent CMOS scaling challenges. Recently, emerging two dimensional materials (2DMs) are investigated towards ultra-scaled CMOS devices, as well as towards non-volatile memory and neuromorphic devices with potential improvements in scalability, power consumption, switching speed, and compatibility with CMOS integration.The first part of this dissertation presents contributions towards high-yield 2DMs field- effect-transistors (FETs) fabrication using wafer-scale chemical vapor deposition (CVD) monolayer MoS2. This work provides valuable insight about metal contact processing, including extraction of Schottky barrier heights and Fermi-level pinning effects, for next- generation integrated electronic systems based on CVD-grown 2DMs.
The second part introduces wafer-scale fabrication of memristor arrays with CVD- grown hexagonal boron nitride (h-BN) as the active switching layer. This work establishes the multi-state analog pulse programmability and presents the first experimental demonstration of dot-product computation and implementation of multi-variable stochastic linear regression on h-BN memristor hardware. This work extends beyond previous demonstrations of non-volatile resistive switching (NVRS) behavior in isolated h-BN memristors and paves the way for more sophisticated demonstrations of machine learning applications based on 2DMs.
Finally, combining the benefits of CVD-grown 2DMs and graphene edge contacts, vertical h-BN memristors with ultra-small active areas are introduced through this research. These devices achieve low operating currents (high resistance), large RHRS/RLRS ratio, and enable three-dimensional (3D) integration (vertical stacking) for ultimate RRAM scalability. Moreover, they facilitate studying fundamental NVRS mechanisms of single conductive nano-filaments (CNFs) which was previously unattainable in planar devices. This way, single quantum step in conductance was experimentally observed, consistent with theorized atomically-constrained CNFs behavior associated with potential improvements in stability of NVRS operation. This is supported by measured improvements in retention of quantized conductance compared to other non-2DMs filamentary-based memristors.</dc:description>
                  <dc:subject>Electrical Engineering</dc:subject>
                  <dc:title>Two Dimensional Materials Based Memristors for In-memory Computing and Neuromorphic Computing</dc:title></oai_dc:dc></metadata></record></GetRecord></OAI-PMH>
