<?xml version="1.0"?>
<OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-05-20T17:13:56Z</responseDate><request verb="GetRecord" metadataPrefix="oai_dc">https://keep.lib.asu.edu/oai/request</request><GetRecord><record><header><identifier>oai:keep.lib.asu.edu:node-171602</identifier><datestamp>2024-12-23T18:01:48Z</datestamp><setSpec>oai_pmh:all</setSpec><setSpec>oai_pmh:repo_items</setSpec></header><metadata><oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd"><dc:identifier>171602</dc:identifier>
          <dc:identifier>https://hdl.handle.net/2286/R.2.N.171602</dc:identifier>
                  <dc:rights>http://rightsstatements.org/vocab/InC/1.0/</dc:rights>
          <dc:rights>All Rights Reserved</dc:rights>
                  <dc:date>2022</dc:date>
                  <dc:format>135 pages</dc:format>
                  <dc:type>Doctoral Dissertation</dc:type>
          <dc:type>Academic theses</dc:type>
          <dc:type>Text</dc:type>
                  <dc:language>eng</dc:language>
                  <dc:contributor>Aguilar, Antony</dc:contributor>
          <dc:contributor>Bowden, Stuart SB</dc:contributor>
          <dc:contributor>Thornton, Trevor TT</dc:contributor>
          <dc:contributor>Augusto, Andre AA</dc:contributor>
          <dc:contributor>Goryll, Michael MG</dc:contributor>
          <dc:contributor>Arizona State University</dc:contributor>
                  <dc:description>Partial requirement for: Ph.D., Arizona State University, 2022</dc:description>
          <dc:description>Field of study: Electrical Engineering</dc:description>
          <dc:description>This paper reports the results of studies comparing various patterning and electroplating methods for the deposition of Cu electrodes for silicon heterojunction solar cells, as well as developing and applying a novel mask-free plating process to plate copper patterns. The direct electroplating portion of this work compared the results of electroplating on different metal seeds from Ag, Ni, Cr and Ti by physical vapor deposition to the light induced plating of Ni/Cu directly on transparent conductive oxide. Patterning was performed using photoresists formed by spin-coating, screen printing or lamination. The geometry of the fingers, line resistance, contact resistance and adhesion were used as comparative parameters for the quality of the electroplated deposit on the different seed layers. The direct electroplating of Cu on the sputtered Ag seed achieved the lowest contact resistance and the best adhesion. All photoresists were able to achieve greater than 60μm resolution and could produce the fingers with the required height, despite the presence of mushrooming of plated copper. The most efficient silicon heterojunction cell with Cu contacts directly electroplated on the sputtered Ag seed achieved 21.9% efficiency on a 153cm2 area. The localized electroplating process developed in this work produced definitive lines of plated copper without the use of any masking materials or methods on the cathode. Cu was deposited using this new method on polished brass substrates and polished silicon wafers with a sputtered Ag front coating, from anodes made of oxygen-free copper (OFC) and platinum. Plating applied voltage and anode-to-cathode distance are varied to study the effect on the plated lines profile. A full finite element method (FEM) model was created to simulate the growth of plated lines using different localized plating methods, including the method used in this work. The model was compared to measured results and used as a predictive tool to simulate the effects of changing anode geometry for future applications in solar. Finally, non-ideal effects of the exposed wire anode plating were discussed, including variations in the electric field which lead to undesirable effects such as pillars, inconsistent aspect ratios, tapering and dendritic growth along the plated line.</dc:description>
                  <dc:subject>Electrical Engineering</dc:subject>
                  <dc:title>Copper Electroplating and Mask-Free Techniques  for Silicon Solar Cell Metallization</dc:title></oai_dc:dc></metadata></record></GetRecord></OAI-PMH>
