<?xml version="1.0"?>
<OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-05-30T01:17:20Z</responseDate><request verb="GetRecord" metadataPrefix="oai_dc">https://keep.lib.asu.edu/oai/request</request><GetRecord><record><header><identifier>oai:keep.lib.asu.edu:node-152421</identifier><datestamp>2024-12-20T18:25:12Z</datestamp><setSpec>oai_pmh:all</setSpec><setSpec>oai_pmh:repo_items</setSpec></header><metadata><oai_dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd"><dc:identifier>152421</dc:identifier>
          <dc:identifier>https://hdl.handle.net/2286/R.I.24764</dc:identifier>
                  <dc:rights>http://rightsstatements.org/vocab/InC/1.0/</dc:rights>
          <dc:rights>All Rights Reserved</dc:rights>
                  <dc:date>2014</dc:date>
                  <dc:format>viii, 69 p. : ill. (some col.)</dc:format>
                  <dc:type>Masters Thesis</dc:type>
          <dc:type>Academic theses</dc:type>
          <dc:type>Text</dc:type>
                  <dc:language>eng</dc:language>
                  <dc:contributor>Kumar, Sushil</dc:contributor>
          <dc:contributor>Clark, Lawrence</dc:contributor>
          <dc:contributor>Bakkaloglu, Bertan</dc:contributor>
          <dc:contributor>Ogras, Umit Y.</dc:contributor>
          <dc:contributor>Arizona State University</dc:contributor>
                  <dc:description>Partial requirement for: M.S., Arizona State University, 2014</dc:description>
          <dc:description>Includes bibliographical references (p. 67-69)</dc:description>
          <dc:description>Field of study: Electrical engineering</dc:description>
          <dc:description>ABSTRACT The D flip flop acts as a sequencing element while designing any pipelined system. Radiation Hardening by Design (RHBD) allows hardened circuits to be fabricated on commercially available CMOS manufacturing process. Recently, single event transients (SET&#039;s) have become as important as single event upset (SEU) in radiation hardened high speed digital designs. A novel temporal pulse based RHBD flip-flop design is presented. Temporally delayed pulses produced by a radiation hardened pulse generator design samples the data in three redundant pulse latches. The proposed RHBD flip-flop has been statistically designed and fabricated on 90 nm TSMC LP process. Detailed simulations of the flip-flop operation in both normal and radiation environments are presented. Spatial separation of critical nodes for the physical design of the flip-flop is carried out for mitigating multi-node charge collection upsets. The proposed flip-flop is also used in commercial CAD flows for high performance chip designs. The proposed flip-flop is used in the design and auto-place-route (APR) of an advanced encryption system and the metrics analyzed.</dc:description>
                  <dc:subject>Electrical Engineering</dc:subject>
          <dc:subject>ciruits</dc:subject>
          <dc:subject>D Flip Flop</dc:subject>
          <dc:subject>Pulse</dc:subject>
          <dc:subject>Radiation hardened</dc:subject>
          <dc:subject>Radiation hardening</dc:subject>
          <dc:subject>Pulse generators</dc:subject>
          <dc:subject>Integrated circuits--Design and construction.</dc:subject>
                  <dc:title>Radiation hardened pulse based D flip flop design</dc:title></oai_dc:dc></metadata></record></GetRecord></OAI-PMH>
