Description

Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some

Caches have long been used to reduce memory access latency. However, the increased complexity of cache coherence brings significant challenges in processor design as the number of cores increases. While making caches scalable is still an important research problem, some researchers are exploring the possibility of a more power-efficient SRAM called scratchpad memories or SPMs.

Reuse Permissions
  • Downloads
    pdf (3 MB)

    Download count: 0

    Details

    Contributors
    Date Created
    2017
    Resource Type
  • Text
  • Collections this item is in
    Note
    • Doctoral Dissertation Computer Science 2017

    Machine-readable links