Design and development of protection schemes for FREEDM smart grid systems

This research work describes the design and validation of protection schemes developed to solve the problem of communication with an ability to detect and sectionalize the fault. Protection schemes have been designed according to the requirements of the Future Renewable Electric Energy Delivery and Management (FREEDM) system. Due to the presence of distributed generation (DG), power flow in the loop is bi-directional and conventional protection schemes may face the problem of unwanted tripping. Hence customized protection schemes have been developed specific to the FREEDM system. Former FREEDM students at ASU have developed ultrafast pilot differential protection using fast analog communication (Ethercat communication) and modified it in various ways to speed up the fault detecting capability of the algorithm. However, the National Science Foundation (NSF) criticized the use of Ethernet communication, as it is not compatible for long distances. FREEDM loop uses a fault current limiter (FCL) to limit the fault current and the substation solid state transformer (SST) reduces the system voltage to limit the fault current to 2 per unit. This allows the protection scheme to detect fault current in 2-3 cycles. However a much delayed fault detection is not encouraged as it will disrupt the power supply to healthy parts of the system for a longer duration. Time inverse directional overcurrent protection, pilot directional protection and PMU based protection are developed in this thesis work addressing the communication problem and at the same time with the ability to quickly detect the faults. Validation of the protection scheme is performed on the Real Time Digital Simulator (RTDS) at the Center for Advanced Power Systems (CAPS) using SEL relays and simulation models are developed in PSCAD.