Description
This research work describes the design of a fault current limiter (FCL) using digital logic and a microcontroller based data acquisition system for an ultra fast pilot protection system. These systems have been designed according to the requirements of the Future Renewable Electric Energy Delivery and Management (FREEDM) system (or loop), a 1 MW green energy hub.
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Contributors
- Thirumalai, Arvind (Author)
- Karady, George G. (Thesis advisor)
- Vittal, Vijay (Committee member)
- Hedman, Kory (Committee member)
- Arizona State University (Publisher)
Date Created
The date the item was original created (prior to any relationship with the ASU Digital Repositories.)
2011
Subjects
Resource Type
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Note
- Partial requirement for: M.S., Arizona State University, 2011Note typethesis
- Includes bibliographical references (p. 90-93)Note typebibliography
- Field of study: Electrical engineering
Citation and reuse
Statement of Responsibility
by Arvind Thirumalai